Apparatus and methods for low noise amplifiers with mid-node impedance networks
Abstract
Apparatus and methods for LNAs with mid-node impedance networks are provided herein. In certain configurations, an LNA includes an input, an output, a transconductance device, a cascode device, and a mid-node impedance network. The transconductance device generates an amplified signal by amplifying an input signal received at the input, and provides the amplified signal to the output via the cascode device. The mid-node impedance network is electrically connected between the transconductance device and the cascode device, and provides compensation for a parasitic capacitance of the gm device, thereby enhancing the LNA's performance.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A low noise amplifier comprising:
a cascode device;
a transconductance device configured to generate an amplified signal based on amplifying an input signal received at an input node, the transconductance device further configured to provide the amplified signal to an output node via the cascode device; and
a mid-node impedance network electrically connected between the transconductance device and the cascode device, the mid-node impedance configured to compensate for a parasitic capacitance of the transconductance device, the mid-node impedance network including a resistor, a capacitor, and an inductor electrically connected in parallel with one another.
2. The low noise amplifier of claim 1 wherein the transconductance device and the cascode device are bipolar transistors, and the parasitic capacitance corresponds to a base-to-collector capacitance of the transconductance device.
3. The low noise amplifier of claim 1 wherein the transconductance device and the cascode device are field-effect transistors, and the parasitic capacitance corresponds to a gate-to-drain capacitance of the transconductance device.
4. The low noise amplifier of claim 1 wherein the mid-node impedance network includes at least one element electrically connected in shunt with respect to a signal path between the transconductance device and the cascode device.
5. The low noise amplifier of claim 1 further comprising a feedback bias circuit configured to control an input bias voltage of transconductance device based on providing feedback from the output node to the input node.
6. A low noise amplifier comprising:
a cascode device;
a transconductance device configured to generate an amplified signal based on amplifying an input signal received at an input node, the transconductance device further configured to provide the amplified signal to an output node via the cascode device;
a mid-node impedance network electrically connected between the transconductance device and the cascode device, the mid-node impedance configured to compensate for a parasitic capacitance of the transconductance device;
a feedback bias circuit configured to control an input bias voltage of transconductance device based on providing feedback from the output node to the input node; and
a bias current source configured to generate a bias current that flows through the cascode device, the mid-node impedance network, and the transconductance device.
7. The low noise amplifier of claim 6 wherein the mid-node impedance network includes a resistor and a capacitor electrically connected in parallel with one another.
8. The low noise amplifier of claim 7 wherein the mid-node impedance network further includes an inductor electrically connected in parallel with the resistor and the capacitor.
9. The low noise amplifier of claim 6 wherein the mid-node impedance network includes at least one element electrically connected in shunt with respect to a signal path between the transconductance device and the cascode device.
10. The low noise amplifier of claim 9 wherein the at least one element includes a capacitor connected between the signal path and ground.
11. The low noise amplifier of claim 6 wherein the transconductance device and the cascode device are field-effect transistors, and the parasitic capacitance corresponds to a gate-to-drain capacitance of the transconductance device.
12. A radio frequency front-end system comprising:
a low noise amplifier including a cascode device, a mid-node impedance network, and a transconductance device configured to generate an amplified radio frequency signal based on amplifying an input radio frequency signal received at an input node and to provide the amplified signal to an output node via the cascode device and the mid-node impedance network, the mid-node impedance network electrically connected between the transconductance device and the cascode device and configured to compensate for a parasitic capacitance of the transconductance device, the mid-node impedance network including a resistor, a capacitor, and an inductor electrically connected in parallel with one another; and
an input switch including a first throw for providing the radio frequency input signal to the low noise amplifier.
13. The radio frequency front-end system of claim 12 wherein the transconductance device and the cascode device are bipolar transistors, and the parasitic capacitance corresponds to a base-to-collector capacitance of the transconductance device.
14. The radio frequency front-end system of claim 12 wherein the transconductance device and the cascode device are field-effect transistors, and the parasitic capacitance corresponds to a gate-to-drain capacitance of the transconductance device.
15. The radio frequency front-end system of claim 12 wherein the mid-node impedance network includes at least one element electrically connected in shunt with respect to a signal path between the transconductance device and the cascode device.
16. The radio frequency front-end system of claim 12 wherein the low noise amplifier further includes a feedback bias circuit configured to control an input bias voltage of transconductance device based on providing feedback from the output node to the input node.
17. The radio frequency front-end system of claim 12 further comprising a bypass path and a power amplifier, the input switch further including a second throw electrically connected to the bypass path and a third throw electrically connected to the power amplifier.
18. A method of low noise amplification comprising:
receiving an input signal at an input node;
generating an amplified signal based on amplifying the input signal using a transconductance device of the low noise amplifier;
providing the amplified signal to an output node via a cascode device of the low noise amplifier;
compensating for a parasitic capacitance of the transconductance device using a mid-node impedance network that is electrically connected between the cascode device and the transconductance device; and
decoupling a gain and a reflection coefficient of the low noise amplifier using the mid-node impedance network.
19. The method of claim 18 wherein compensating for the parasitic capacitance of the transconductance device including compensating for a base-to-collector capacitance.
20. The method of claim 18 wherein compensating for the parasitic capacitance of the transconductance device including compensating for a gate-to-drain capacitance.Join the waitlist — get patent alerts
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