System-on-chips and electronic devices including same

Abstract

A system-on-chip (SoC) includes an application processor (AP) including a secure module and a non-secure module, a communication processor (CP), a volatile memory having a first area accessible by the CP, a second area accessible by only the AP, and a third area accessible by the CP and the AP, and non-volatile memory storing a boot loader and a firmware image. Upon power-up of the SoC, the AP copies the boot loader and firmware image from the non-volatile memory to the first area using the non-secure module, switches the first area from a normal mode to a secure mode using the secure module, and verifies integrity of the first firmware image to activate a reset signal. The CP then performs a CP boot operation using the boot loader and firmware image stored in the first area in response to the activated reset signal.

What is claimed is: 
     
       1. A system-on-chip (SoC), comprising:
 a non-volatile memory that stores a first boot loader and a first firmware image; 
 a volatile memory including a first area, a second area, and a third area; 
 an application processor (AP) comprising a secure module and a non-secure module and configured upon powered-up to copy the first boot loader and first firmware image from the non-volatile memory to the first area, switch the first area from a normal mode to a secure mode, verify integrity of the first firmware image stored in the first area, and activate a reset signal upon successfully verifying the integrity of the first firmware image, wherein the secure module among the secure module and the non-secure module is allowed access to the first area after the first area has been switched to the secure mode; and 
 a communication processor (CP) configured to perform a CP boot operation using at least one of the first boot loader and first firmware image stored in the first area in response to the activated reset signal. 
 
     
     
       2. The SoC of  claim 1 , wherein the first firmware image includes a first firmware data corresponding to an operating system code for the CP, and a digital signature derived from the first firmware data. 
     
     
       3. The SoC of  claim 2 , wherein the AP verifies the integrity of the first firmware image by determining whether the first firmware data has been changed after the digital signature was derived using the digital signature and a public key. 
     
     
       4. The SoC of  claim 1 , wherein the CP and the secure module of the AP are allowed access the first area after the first area has been switched to the secure more. 
     
     
       5. The SoC of  claim 1 , wherein the non-volatile memory stores operating parameters, and upon power-up, the AP is further configured to copy the operating parameters to the first area. 
     
     
       6. The SoC of  claim 1 , wherein the non-volatile memory stores a second boot loader and a second firmware image, and upon power-up, the AP is further configured to copy the second boot loader and second firmware image from the non-volatile memory to the second area, and thereafter, perform an AP boot operation using at least one of the second boot loader and second firmware image stored in the second area. 
     
     
       7. The SoC of  claim 1 , wherein the AP is further configured to copy the first boot loader from the non-volatile memory to a boot area of the first area beginning at a predetermined boot address. 
     
     
       8. The SoC of  claim 7 , wherein the CP stores the predetermined boot address before power-up and is further configured to read the first boot loader from the boot area beginning at the predetermined boot address in response to the activated reset signal, and perform the CP boot operation by executing the first boot loader. 
     
     
       9. The SoC of  claim 8 , wherein after performing of the CP boot operation, the CP is further configured to perform a normal operation using the boot area as a working memory. 
     
     
       10. The SoC of  claim 1 , wherein the
 non-secure module is allowed to access the first area only when the first area is in the normal mode. 
 
     
     
       11. The SoC of  claim 10 , wherein the AP is further configured to:
 copy the first boot loader and first firmware image from the non-volatile memory to the first area upon power-up using the non-secure module, and thereafter, to provide a verification request signal from the non-secure module to the secure module, 
 switch the first area from the normal mode to the secure mode using the secure module in response to the verification request signal, 
 verify the integrity of the first firmware image stored in the first area using the secure module, 
 provide upon successfully verifying the integrity of the first firmware image a verification success signal from the secure module to the non-secure module or provide upon not successfully verifying the integrity of the first firmware image a verification fail signal from the secure module to the non-secure module, and 
 activate the reset signal upon receiving the verification success signal using the non-secure module, or maintain the reset signal as deactivated upon receiving the verification fail signal using the non-secure module. 
 
     
     
       12. The SoC of  claim 10 , wherein the second area is accessed by only the AP, and the third area is accessed by both of the AP and CP. 
     
     
       13. The SoC of  claim 12 , wherein the CP is further configured to:
 provide an interrupt signal to the non-secure module when the CP terminates abnormally during the normal operation after performing the CP boot operation, and 
 perform a reboot operation using the first boot loader and first firmware image stored in the first area in response to the activated reset signal; and 
 the AP is further configured to:
 copy the first boot loader stored in the non-volatile memory to the third area using the non-secure module in response to the interrupt signal and provide a copy request signal to the secure module, 
 
 copy the first boot loader from the third area to a boot area of the first area in response to the copy request signal using the secure module and provide a copy finish signal to the non-secure module, 
 activate the reset signal using the secure module in response to the copy finish signal. 
 
     
     
       14. The SoC of  claim 13 , wherein while the CP performs the reboot operation, the first area is maintained in the secure mode. 
     
     
       15. An electronic device, comprising:
 an antenna; 
 a storage device that stores data; and 
 a System-on-Chip (SoC) configured to communicate the data with an external device using the antenna; the SoC including: 
 a non-volatile memory that stores a first boot loader and a first firmware image; 
 a volatile memory including a first area, a second area, and a third area; 
 an application processor (AP) comprising a secure module and a non-secure module and configured upon power-up to copy the first boot loader and first firmware image from the non-volatile memory to the first area, switch the first area from a normal mode to a secure mode, verify integrity of the first firmware image stored in the first area, and to activate a reset signal when the verification succeeds, wherein the secure module among the secure module and the non-secure module is allowed access to the first area after the first area has been switched to the secure mode; and 
 a communication processor (CP) configured to perform a CP boot operation using the first boot loader and first firmware image stored in the first area in response to the activated reset signal. 
 
     
     
       16. A system-on-chip (SoC), comprising:
 an application processor (AP) including a secure module and a non-secure module; 
 a communication processor (CP); 
 a volatile memory having a first area accessible by the CP, a second area accessible by only the AP, and a third area accessible by the CP and the AP; and 
 a non-volatile memory storing a first boot loader, a first firmware image, a second boot loader, a second firmware image and operating parameters; 
 upon power-up of the SoC, the AP is configured to:
 (1) copy the second boot loader and second firmware image from the non-volatile memory to the second area, and perform an AP boot operation using the second boot loader and second firmware image; 
 (2) copy the first boot loader, first firmware image and the operating parameters from the non-volatile memory to the first area using the non-secure module; 
 (3) switch the first area from a normal mode to a secure mode using the secure module; 
 (4) verify integrity of the first firmware image stored in the first area, and upon successfully verifying the integrity of the first firmware activate a reset signal provided to the CP; and 
 
 the CP is configured to perform a CP boot operation using the first boot loader, first firmware image and operating parameters stored in the first area in response to the activated reset signal. 
 
     
     
       17. The SoC of  claim 16 , wherein after the performing of the CP boot operation, the CP is further configured to perform a normal operation, and
 upon abnormally terminating the normal operation, the CP is further configured to perform a reboot operation. 
 
     
     
       18. The SoC of  claim 17 , wherein upon performing of the reboot operation, the CP is further configured to provide an interrupt signal to the non-secure module,
 the non-secure module is configured in response to the interrupt signal to re-copy the first boot loader from the non-volatile memory to the third area; 
 the secure module is configured in response to the interrupt signal to copy the first boot loader from the third area to the first area, and thereafter activate a reset signal, such that the CP performs the reboot operation using the first boot loader copied by the secure module from the third area to the first area. 
 
     
     
       19. The SoC of  claim 16 , wherein the first area may be set to operate in a normal mode or a secure mode by the secure module,
 the CP never has access to the non-volatile memory and the second area, and 
 the non-secure module only has access to the first area when the first area is set to operate in the normal mode. 
 
     
     
       20. The SoC of  claim 16 , wherein the CP remains powered off and will not perform the CP boot operation until the reset signal is activated.