Semiconductor device including an ESD protection element

Abstract

A semiconductor device includes a MOS transistor and an ESD protection element comprised of an NMOS off transistor having a gate potential equal to a ground potential or a well potential. The off transistor has an N-type drain region and a P-type drain region in a drain active region thereof. The P-type region has a potential that is the potential of a P well or a P-type semiconductor substrate. A junction withstand voltage of a PN junction in the drain active region is the withstand voltage of the ESD protection element.

What is claimed is: 
     
       1. A semiconductor device including an ESD protection element,
 the semiconductor device comprising an element in an internal circuit region and having an operating voltage, 
 the ESD protection element comprising an N-type MOS transistor provided on one of a P well and a P-type semiconductor substrate, 
 the N-type MOS transistor including a gate electrode connected to one of the P well and the P-type semiconductor substrate such that the gate electrode has one of a well potential that is a potential of the P well and a ground potential that is a potential of the P-type semiconductor substrate, 
 the N-type MOS transistor having a drain active region in which an N-type high-concentration drain region and a P-type drain region are adjacent to each other to form a PN junction, 
 the P-type drain region having a potential that comprises one of the potential of the P well and the potential of the P-type semiconductor substrate, 
 the P-type drain region being adjacent to an end portion of the drain active region in a W direction, and another P-type drain region being provided in a region away from the end portion in the W direction, and 
 the ESD protection element having a withstand voltage that comprises a junction withstand voltage of the PN junction in the drain active region. 
 
     
     
       2. A semiconductor device including an ESD protection element,
 the semiconductor device comprising an element in an internal circuit region and having an operating voltage, 
 the ESD protection element comprising an N-type MOS transistor provided on one of a P well and a P-type semiconductor substrate, 
 the N-type MOS transistor including a gate electrode connected to one of the P well and the P-type semiconductor substrate such that the gate electrode has one of a well potential that is a potential of the P well and a ground potential that is a potential of the P-type semiconductor substrate, 
 the N-type MOS transistor having a drain active region in which an N-type high-concentration drain region and a P-type drain region are adjacent to each other to form a PN junction, 
 the P-type drain region having a potential that comprises one of the potential of the P well and the potential of the P-type semiconductor substrate, 
 the P-type drain region being adjacent to each of two end portions of the drain active region in a W direction, along a rim of the gate electrode, and 
 the ESD protection element having a withstand voltage that comprises a junction withstand voltage of the PN junction in the drain active region. 
 
     
     
       3. A semiconductor device including an ESD protection element,
 the semiconductor device comprising an element in an internal circuit region and having an operating voltage, 
 the ESD protection element comprising an N-type MOS transistor provided on one of a P well and a P-type semiconductor substrate, 
 the N-type MOS transistor including a gate electrode connected to one of the P well and the P-type semiconductor substrate such that the gate electrode has one of a well potential that is a potential of the P well and a ground potential that is a potential of the P-type semiconductor substrate, 
 the N-type MOS transistor having a drain active region in which an N-type high-concentration drain region and a P-type drain region are adjacent to each other to form a PN junction, 
 the P-type drain region having a potential that comprises one of the potential of the P well and the potential of the P-type semiconductor substrate, 
 the N-type high-concentration drain region being entirely surrounded by the P-type drain region, and 
 the ESD protection element having a withstand voltage that comprises a junction withstand voltage of the PN junction in the drain active region.