Laser system having a dual pulse-length regime
Abstract
A single loop hardware-based system for producing laser pulses in a microsecond scale operational mode includes a GUI to enable a user to select the operational mode of the system; a laser source for producing one or more laser beam pulses, the laser source being a diode laser pump source module; a DSP which enables and disables a hardware-based FPGA. The FPGA controls the diode pump source module. When a user selects one or more microsecond scale laser sub-pulses on the GUI, the DSP transmits to the FPGA the sub-pulse energy level and the sub-pulse on-time selected by the user on the GUI. A photodetector operatively connected to the hardware-based system measures the power of the laser pulse beam that was transmitted to the photodetector and, in a feedback mode, transmits a feedback signal of that power measurement to the FPGA. The FPGA compares the power of the laser beam measured by the photodetector to the power of the laser beam selected by the user on the GUI. If the power level read by the FPGA is higher than the selected power level, the FGPA decreases the power level to the pumping source module for any subsequent laser pulses; and if the power level read by the FPGA is less than the selected power level, the FGPA increases the power level to the pumping source module for subsequent laser pulses.
Claims
exact text as granted — not AI-modifiedWhat we claim is:
1. A system for producing laser pulses in a microsecond scale operational mode:
the system consisting of a single loop hardware-based component;
the system further comprising:
a graphical user interface (GUI) to enable a user to select the operational mode of the system;
a laser source for producing one or more laser beam pulses, the laser source being a diode laser pump source module;
a digital signal processor (DSP) which enables and disables a hardware-based field programmable gate array (FPGA);
wherein the field programmable gate array (FPGA) controls the diode pump source module;
wherein when a user selects one or more microsecond scale laser sub-pulses on the graphical user interface (GUI), the DSP transmits to the field programmable gate array (FPGA) the sub-pulse energy level and the sub-pulse on-time selected by the user on the graphical user interface (GUI);
wherein, a photodetector operatively connected to the hardware-based system measures the power of the laser pulse beam that was transmitted to the photodetector and, in a feedback mode, transmits a feedback signal of that power measurement to the field programmable gate array (FPGA); and wherein the field programmable gate array (FPGA) compares the power of the laser beam measured by the photodetector to the power of the laser beam selected by the user on the graphical user interface (GUI);
and, wherein if power level read by the field programmable gate array (FPGA) is higher than the selected power level, the field programmable gate array (FPGA) decreases the power level to the pumping source module for any subsequent laser pulses; and if the power level read by the field programmable gate array (FPGA) is less than the selected power level, the field programmable gate array (FPGA) increases the power level to the pumping source module for subsequent laser pulses.
2. The system of claim 1 , further comprising a beam splitter in the optical path of the diode laser pump source module, the beam splitter dividing a laser pulse from the laser source into two portions; one portion of the laser beam pulse being transmitted to a target tissue; the other portion of the laser beam pulse being transmitted to a photodetector.
3. The system of claim 2 , wherein the beam splitter is one of a: mirror or a prism.
4. The system of claim 2 , wherein the photodetector comprises more than one photodetector for redundancy operation.
5. The system of claim 1 , wherein the field programmable gate array (FPGA) reads the feedback signal once every one to ten microseconds to compare measured power to selected power.
6. The system of claim 1 , wherein the graphical user interface (GUI) controls the system to deliver one pulse or more than one pulse in the microsecond operational mode.
7. The system of claim 1 , further comprising a calibration device to calibrate the power of one or more pulses in the microsecond scale of operation.
8. The system of claim 7 , wherein the calibration device calibrates using a two-step algorithm to stabilize the energy profile of the microsecond operational mode.
9. The system of claim 8 , wherein the algorithm includes a sequence of: a first energy step of a set energy value, followed by a first delay period, then a second energy step of a set value followed by a second delay period.
10. The system of claim 9 , wherein after the second delay, the field programmable gate array (FPGA) samples the photodetector at a specified rate of frequency in the microsecond operational mode to compare the sampled measurement from the photodetector to the selected energy level.
11. The system of claim 1 , wherein a user sets on the graphical user interface (GUI) the desired pulse power level, wherein the field programmable gate array (FPGA) causes the laser module to provide one or more pulses to be measured by the photodetector to determine whether the set desired pulse level is reached; and, if so, the set power level is stored in a memory of a computer system.
12. A method for producing laser pulses with a single loop hardware-based system:
the system consisting of a single loop hardware-based device;
the method providing the single loop hardware-based system capable of producing laser pulses in a microsecond scale operational mode, the system further comprising:
a graphical user interface (GUI) to enable a user to select the operational mode of the system;
a laser source for producing one or more laser beam pulses, the laser source being a diode laser pump source module;
a digital signal processor (DSP) which enables and disables a hardware-based field programmable gate array (FPGA);
the diode pump source module being controlled by the field programmable gate array (FPGA);
wherein the method further comprises:
when a user selects one or more microsecond scale laser sub-pulses on the graphical user interface (GUI), the digital signal processor (DSP) transmits to the field programmable gate array (FPGA) the sub-pulse energy level and the sub-pulse on-time selected by the user on the GUI;
a photodetector operatively connected to the hardware-based system measuring the power of the laser pulse beam that was transmitted to the photodetector and, in a feedback mode, transmitting a feedback signal of that power measurement to the field programmable gate array (FPGA); the field programmable gate array (FPGA) comparing the power of the laser beam measured by the photodetector to the power of the laser beam selected by the user on the graphical user interface (GUI);
and, wherein if power level read by the field programmable gate array (FPGA) is higher than the selected power level, the field programmable gate array (FPGA) decreasing the power level to the pumping source module for any subsequent laser pulses; and if the power level read by the field programmable gate array (FPGA) is less than the selected power level, the field programmable gate array (FPGA) increasing the power level to the pumping source module for subsequent laser pulses.
13. The method of claim 12 , further comprising the step when a user sets on the graphical user interface (GUI) the desired pulse power level, the field programmable gate array (FPGA) causes the laser module to provide one or more pulses to be measured by the photodetector to determine whether the set desired pulse level is reached; and, if so, the set power level is stored in a memory of a computer system.
14. The method of claim 12 , further comprising a calibration device to calibrate the power of one or more pulses in the microsecond scale of operation.
15. The method of claim 14 , wherein the calibration device calibrating using a two-step algorithm to stabilize the energy profile of the microsecond operational mode.
16. The method of claim 15 , wherein the algorithm includes a sequence of: a first energy step of a set energy value, followed by a first delay period, then a second energy step of a set value followed by a second delay period.
17. The method of claim 16 , further comprising the step wherein, after the second delay, the field programmable gate array (FPGA) sampling the photodetector at a high rate of frequency in the microsecond operational mode and comparing the sampled measurement from the photodetector to the selected energy level.Cited by (0)
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