Analog processing system for massive-MIMO

Abstract

An analog processing subsystem is disclosed. Said subsystem comprising at least one antenna ( 202,302 ), a duplexer ( 202 a, 302 a ), at least one power amplifier ( 203 a, 203 b ), at least one mixer ( 204 a, 204 b, 304 a, 304 b ) and an interface connectable to a baseband processing subsystem. The at least one mixer ( 204 a, 204 b, 304 a, 304 b ) is adapted to down-convert and inphase/quadrature—IQ—demodulate a received analog radio frequency signal, received by the at least one antenna ( 202,302 ), to provide a received analog baseband signal and to IQ-modulate and up-convert a transmit analog baseband signal, to be transmitted by the at least one antenna ( 202, 302 ), to provide a transmit analog radio frequency signal. The analog processing subsystem is comprised on a single analog radio frequency processing chip ( 201,301 ) comprising a metallization on at least one side of the chip for integration of the at least one antenna ( 202,302 ).

The invention claimed is: 
     
       1. A multiple input multiple output (MIMO) transceiver arrangement comprising a plurality of removable analog processing subsystems operatively connected to at least one baseband processing subsystem,
 wherein the plurality of analog processing subsystems comprises a first number of analog processing subsystems, wherein the at least one baseband processing subsystem comprises a second number of baseband processing subsystems, and wherein the first number exceeds the second number, 
 each analog processing subsystem comprising at least one antenna, a duplexer, at least one power amplifier, at least one mixer and an interface connectable to a baseband processing subsystem, 
 wherein the at least one mixer is adapted to down-convert and inphase/quadrature (IQ) demodulate a received analog radio frequency signal, received by the at least one antenna, to provide a received analog baseband signal and to IQ-modulate and up-convert a transmit analog baseband signal, to be transmitted by the at least one antenna, to provide a transmit analog radio frequency signal, 
 wherein the mixer comprises at least one input terminal connected to an input terminal of the interface for acquiring the transmit analog baseband signal and at least one output terminal connected to an output terminal of the interface for providing the received analog baseband signal, wherein the at least one antenna is directly connected to the duplexer, the duplexer is directly connected to the at least one power amplifier, the at least one power amplifier is directly connected to the at least one mixer and the at least one mixer is directly connected to the interface, 
 wherein the plurality of analog processing subsystems are comprised on a single analog radio frequency processing chip, and 
 wherein the analog radio frequency processing chip comprises a metallization on at least one side of the chip and wherein the metallization comprises integration of the at least one antenna. 
 
     
     
       2. The arrangement according to  claim 1 , wherein the at least one antenna consists of at least one antenna only. 
     
     
       3. The arrangement according to  claim 2 , wherein the mixer and the at least one power amplifier are integrated into the single analog radio frequency processing chip with a power amplifier process. 
     
     
       4. The arrangement according to  claim 3 , wherein the power amplifier process is at least one of a process for gallium-arsenide pseudomorphic high electron mobility transistors PHEMT-GaAs, a process for gallium-arsenide heterojunction bipolar transistor GaAs-HBT, a process for silicon-germanium bipolar complementary metal oxide semiconductor SiGe Bi-CMOS, a process for silicon on insulator SOI, a process for fully depleted SOI FDSOI, and a process for Si-CMOS. 
     
     
       5. The arrangement according to  claim 1 , wherein the metallization forms an antenna structure integrated with bond wires. 
     
     
       6. The arrangement according to  claim 5 , wherein the antenna structure is provided on a first side of the analogue radio frequency processing chip, wherein said first side is a circuit side of said chip. 
     
     
       7. The arrangement according to  claim 5 , wherein the antenna structure is provided on a second side of the analogue radio frequency processing chip, wherein said second side is opposite to a circuit side of said chip. 
     
     
       8. The arrangement according to  claim 7 , wherein the antenna structure is adapted to isolate each analog processing subsystem from radiation. 
     
     
       9. The arrangement according to  claim 5 , wherein the antenna structure is adapted to operate as a connector to a wave guide. 
     
     
       10. The arrangement according to  claim 1 , wherein the baseband processing subsystem comprises at least one analog to digital converter ADC configured to convert the received analog baseband signal into a received digital signal. 
     
     
       11. The arrangement according to  claim 10 , wherein the baseband processing subsystem further comprises at least one digital to analog converter DAC configured to convert a transmit digital signal into the transmit analog baseband signal, and wherein the baseband processing subsystem is configured to provide the transmit analog baseband signal to the analog processing chip. 
     
     
       12. The arrangement according to  claim 1 , wherein the baseband processing subsystem is comprised on a baseband processing chip. 
     
     
       13. A wireless communication device comprising the arrangement according to  claim 1 . 
     
     
       14. The wireless communication device according to  claim 13 , wherein the wireless communication device is a mobile communication device.