US10290632B2ActiveUtilityA1

AC-coupled switch and metal capacitor structure for nanometer or low metal layer count processes

80
Assignee: QORVO US INCPriority: Nov 21, 2016Filed: Jul 14, 2017Granted: May 14, 2019
Est. expiryNov 21, 2036(~10.4 yrs left)· nominal 20-yr term from priority
H10W 20/496H10W 20/20H01L 27/0629H01L 28/60H01L 23/535H10D 84/813H10D 1/692H10D 89/10H10D 84/811
80
PatentIndex Score
3
Cited by
3
References
16
Claims

Abstract

Alternating Current (AC)-coupled switch and metal capacitor structures for nanometer or low metal layer count processes are provided. According to one aspect of the present disclosure, a switch and capacitor structure comprises a substrate comprising a device region with a Field Effect Transistor (FET) formed therein, the FET having a source terminal comprising a structure in a first metal layer and a drain terminal comprising a structure in the first metal layer, and a capacitor comprising a first plate and a second plate, the first plate comprising a structure in a second metal layer, the second metal layer being above the first metal layer, the structure of the first plate being electrically connected to the structure of the drain terminal, and the second plate comprising a structure in the second metal layer, the structure of the first plate spaced from the structure of the second plate.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A switch and metal capacitor structure, comprising:
 a substrate comprising a device region with a Field Effect Transistor (FET) formed therein, the FET having a source terminal (S) comprising a structure in a first metal layer and a drain terminal (D) comprising a structure in the first metal layer; and 
 a capacitor comprising a first plate and a second plate, the first plate comprising a structure in a second metal layer, the second metal layer being above the first metal layer, the structure of the first plate being electrically connected to the structure of the drain terminal (D), the second plate comprising a structure in the second metal layer, the structure of the first plate spaced from the structure of the second plate, and the structure of the second plate is not electrically connected to the device region. 
 
     
     
       2. The switch and metal capacitor structure of  claim 1  wherein the first and second metal layers are the metal layers that are closest to the substrate. 
     
     
       3. The switch and metal capacitor structure of  claim 1  wherein the structure of the first plate comprises a first plurality of parallel conductors in the second metal layer and the structure of the second plate comprises a second plurality of parallel conductors in the second metal layer interdigitated between the first plurality of parallel conductors in the second metal layer. 
     
     
       4. The switch and metal capacitor structure of  claim 3  wherein the structure of the source terminal (S) comprises a third plurality of parallel conductors in the first metal layer. 
     
     
       5. The switch and metal capacitor structure of  claim 4  wherein an orientation of the third plurality of parallel conductors is different from an orientation of the first and second pluralities of parallel conductors. 
     
     
       6. The switch and metal capacitor structure of  claim 5  wherein the orientation of the third plurality of parallel conductors is essentially perpendicular to the orientation of the first and second pluralities of parallel conductors. 
     
     
       7. The switch and metal capacitor structure of  claim 1  wherein the structure of the second plate comprises a conductive loop that surrounds the structure of the first plate. 
     
     
       8. The switch and metal capacitor structure of  claim 1  wherein the structure of the second plate comprises a plurality of conductive loops, each loop surrounding a portion of the structure of the first plate, the portions of the structure of the first plate being electrically connected to each other. 
     
     
       9. The switch and metal capacitor structure of  claim 1  wherein the structure of the drain terminal (D) further comprises one or more electrically conductive vias that extend above or below the first metal layer but that do not make electrical contact with another conductive layer or the substrate. 
     
     
       10. The switch and metal capacitor structure of  claim 1  wherein at least one of the structure of the first plate and the structure of the second plate comprises one or more electrically conductive vias that extend above or below the second metal layer but that do not make electrical contact with another conductive layer or the substrate. 
     
     
       11. The switch and metal capacitor structure of  claim 1  wherein at least one of the first and second plates is electrically coupled to a structure in a third metal layer, the third metal layer being above the second metal layer. 
     
     
       12. The switch and metal capacitor structure of  claim 1  wherein the first plate is electrically coupled to a structure in a third metal layer, the third metal layer being above the second metal layer, and wherein the second plate is electrically coupled to a structure in the third metal layer. 
     
     
       13. A switch and metal capacitor structure, comprising:
 a substrate comprising a device region with a Field Effect Transistor (FET) formed therein, the FET having a source terminal (S) comprising a structure in a first metal layer and a drain terminal (D) comprising a structure in the first metal layer, wherein the source terminal (S) and the drain terminal (D) are above the device region; and 
 a capacitor comprising a first plate and a second plate, the first plate comprising at least a portion of the structure of the drain terminal (D) in the first metal layer and the second plate comprising a structure in a second metal layer, the second metal layer being above the first metal layer, the structure of the second plate spaced from the structure of the drain terminal (D), and the structure of the second plate is not electrically connected to the device region. 
 
     
     
       14. The switch and metal capacitor structure of  claim 13  wherein the first and second metal layers are the metal layers that are closest to the substrate. 
     
     
       15. The switch and metal capacitor structure of  claim 13  further comprising a plurality of second plates that include the second plate and wherein the plurality of second plates are electrically connected together. 
     
     
       16. The switch and metal capacitor structure of  claim 15  wherein the plurality of second plates are electrically connected together by a third metal layer that is above the second metal layer.

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