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US10312702B2ActiveUtilityPatentIndex 51

Overvoltage and overcurrent protection circuit and mobile terminal

Assignee: GUANG DONG OPPO MOBILE TELECOMM CORP LTDPriority: Jan 28, 2014Filed: May 26, 2014Granted: Jun 4, 2019
Est. expiryJan 28, 2034(~7.6 yrs left)· nominal 20-yr term from priority
Inventors:ZHANG JIALIANGWU KEWEICHENG WENQIANGHUANG DASHUAIHU YUANXIANG
H02J 7/63H02J 7/61H02J 7/865H02J 7/64H02J 7/62H02H 3/202H01H 2085/0283H01M 2220/30H02J 2207/10H01M 10/448H01M 2200/103H01M 2200/00H02H 7/18H02H 3/087H01H 2085/025H01M 50/583H01M 2/34H02J 7/0029H02J 7/007H02J 2007/004H02J 2007/0095H01M 10/44H02J 2007/0037H02J 2007/0039H02J 7/0068Y02E60/10H01M 50/572H02J 7/90H02J 7/663
51
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References
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Claims

Abstract

The present disclosure provides an overvoltage and overcurrent protection circuit and a mobile terminal. The overvoltage and overcurrent protection circuit comprises a primary protection circuit and a secondary protection circuit. The primary protection circuit comprises a power end coupled to an anode of a cell, a detection end coupled to a cathode of the cell, and a low potential interface end coupled to a ground end of a charging and discharging interface. The secondary protection circuit comprises a high potential cell end, a low potential cell end, and a high potential interface end, in which the high potential cell end is externally coupled to the anode of the cell, the low potential cell end is externally coupled to the cathode of the cell, and the high potential interface end is externally coupled to a power end of the charging and discharging interface.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. An overvoltage and overcurrent protection circuit, comprising:
 a primary protection circuit, comprising a power end, a detection end, and a low potential interface end, wherein the power end is coupled to an anode of a cell, the detection end is coupled to a cathode of the cell, and the low potential interface end is coupled to a ground end of a charging and discharging interface; the primary protection circuit is configured to detect whether there is an over-charging when the cell is charged, and to switch off charging the cell via the charging and discharging interface if there is the over-charging; the primary protection circuit is further configured to detect whether there is an over-discharging when the cell is discharging, and switch off discharging of the cell via the charging and discharging interface if there is the over-discharging; and 
 a secondary protection circuit, comprising a high potential cell end, a low potential cell end, and a high potential interface end, wherein the high potential cell end is externally coupled to the anode of the cell, the low potential cell end is externally coupled to the cathode of the cell, and the high potential interface end is externally coupled to a power end of the charging and discharging interface; the secondary protection circuit is configured to perform an overvoltage protection and an overcurrent protection via a fuse when the cell is charged via the charging and discharging interface. 
 
     
     
       2. The overvoltage and overcurrent protection circuit according to  claim 1 , wherein, the overvoltage and overcurrent protection circuit further comprises:
 a filtering circuit, comprising a high potential end and a low potential end; wherein, the high potential end is coupled to the low potential interface end of the primary protection circuit, and the low potential end is coupled to the high potential interface end of the secondary protection circuit; the filtering circuit is configured to perform a low-pass filtering on an electric signal inputted from the charging and discharging interface when the cell is charged via the charging and discharging interface. 
 
     
     
       3. The overvoltage and overcurrent protection circuit according to  claim 1 , wherein,
 the secondary protection circuit comprises a first resistor, a first capacitor, a second resistor, a second capacitor, a third resistor, a third capacitor, a voltage detection chip, a limit-voltage and limit-current fuse chip and a switch circuit; 
 a first terminal of the first resistor, a second terminal of third resistor and a second fuse pin of the limit-voltage and limit-current fuse chip are respectively configured as the high potential cell end, the low potential cell end and the high potential interface end of the secondary protection circuit, a positive voltage detection pin, a negative voltage pin, a control output pin, a power pin and a delay pin of the voltage detection chip are respectively coupled to a second terminal of the first resistor, a first terminal of the first capacitor, a second terminal of the third resistor, a controlled terminal of the switch circuit, a first terminal of the third capacitor and a first terminal of the second capacitor, each of a second terminal of the first capacitor, a second terminal of the third capacitor and a second terminal of the second capacitor is coupled to a second terminal of the third resistor, a first terminal and a second terminal of the second resistor are respectively coupled to a first fuse pin of the limit-voltage and limit-current fuse chip and the first terminal of the third capacitor, a first terminal of the third resistor is coupled to a control end of the switch circuit, a high potential end and a low potential end of the switch circuit are respectively coupled to a limit-voltage pin of the limit-voltage and limit-current fuse chip and a second terminal of the third resistor. 
 
     
     
       4. The overvoltage and overcurrent protection circuit according to  claim 3 , wherein,
 the switch circuit comprises a NMOS transistor; and 
 a drain electrode, a gate electrode and a source electrode of the NMOS transistor are respectively configured as the high potential end, the controlled end and the low potential end of the switch circuit. 
 
     
     
       5. The overvoltage and overcurrent protection circuit according to  claim 1 , wherein,
 the primary protection circuit comprises a fourth resistor, a fifth resistor, a sixth resistor, a fourth capacitor, a fifth capacitor, a sixth capacitor, an over-charging and over-discharging detecting chip, a third switch chip and a fourth switch chip; 
 a first terminal of the fourth resistor, a first terminal of the fifth resistor and a second terminal of the sixth resistor are respectively configured as the power end, the detection end and the low potential interface end of the primary protection circuit; a current detection pin, a power pin, a ground pin, a low potential pin, an over-charging pin and an over-discharging pin of the over-charging and over-discharging detecting chip are respectively coupled to a second terminal of the fourth resistor, a first terminal of the fourth capacitor, a first terminal of the fifth resistor, a first terminal of the sixth resistor, a first gate pin of the third switch chip and a second gate pin of the third switch chip, a second terminal of the fourth capacitor is coupled to a first terminal of the fifth resistor, a first source pin and a second source pin of the third switch chip are respectively grounded and coupled to a second terminal of the fifth resistor, a third gate pin, a fourth gate pin, a third source pin, and a fourth source pin of the fourth switch chip are respectively coupled to the first gate pin, the second gate pin, the first source pin, and the second source pin of the third switch chip, the fifth capacitor and the sixth capacitor coupled in series are coupled between the first source pin and the second source pin of the third switch chip, and a second terminal of the sixth resistor is grounded. 
 
     
     
       6. The overvoltage and overcurrent protection circuit according to  claim 2 , wherein,
 the filtering circuit comprises a seventh capacitor and an eighth capacitor; and 
 a first terminal of the seventh capacitor and a second terminal of the eighth capacitor are respectively configured as the high potential end and the low potential end of the filtering circuit, and a second terminal of the seventh capacitor is coupled to a first terminal of the eighth capacitor. 
 
     
     
       7. The overvoltage and overcurrent protection circuit according to  claim 1 , wherein, the charging and discharging interface is a USB (Universal Serial Bus) interface. 
     
     
       8. The overvoltage and overcurrent protection circuit according to  claim 7 , wherein, a power end and a ground end of the USB interface can support current equal to or less than a preset current threshold. 
     
     
       9. The overvoltage and overcurrent protection circuit according to  claim 8 , wherein,
 the power end of the USB interface comprises at least two power pins; and 
 the ground end of the USB interface comprises at least two ground pins. 
 
     
     
       10. A mobile terminal, comprising a cell and a charging and discharging interface, wherein, the mobile terminal further comprises the overvoltage and overcurrent protection circuit, and the overvoltage and overcurrent protection circuit comprises:
 a primary protection circuit, comprising a power end, a detection end, and a low potential interface end, wherein the power end is coupled to an anode of a cell, the detection end is coupled to a cathode of the cell, and the low potential interface end is coupled to a ground end of a charging and discharging interface; the primary protection circuit is configured to detect whether there is an over-charging when the cell is charged, and to switch off charging the cell via the charging and discharging interface if there is the over-charging; the primary protection circuit is further configured to detect whether there is an over-discharging when the cell is discharging, and switch off discharging of the cell via the charging and discharging interface if there is the over-discharging; and 
 a secondary protection circuit, comprising a high potential cell end, a low potential cell end, and a high potential interface end, wherein the high potential cell end is externally coupled to the anode of the cell, the low potential cell end is externally coupled to the cathode of the cell, and the high potential interface end is externally coupled to a power end of the charging and discharging interface; the secondary protection circuit is configured to perform an overvoltage protection and an overcurrent protection via a fuse when the cell is charged via the charging and discharging interface. 
 
     
     
       11. The overvoltage and overcurrent protection circuit according to  claim 3 , wherein,
 the limit-voltage and limit-current fuse chip comprises a first fuse, a second fuse and a seventh resistor; 
 the first fuse and the second fuse are coupled in series and coupled between the first fuse pin and the second fuse pin of the limit-voltage and limit-current fuse chip; and 
 the seventh resistor is coupled between a junction of the first fuse and the second fuse and the limit-voltage pin of the limit-voltage and limit-current fuse chip. 
 
     
     
       12. The overvoltage and overcurrent protection circuit according to  claim 9 , wherein a number of the power pins is equal to that of the ground pins. 
     
     
       13. The overvoltage and overcurrent protection circuit according to  claim 8 , wherein the preset current threshold is 4 A. 
     
     
       14. The mobile terminal according to  claim 10 , wherein the overvoltage and overcurrent protection circuit further comprises:
 a filtering circuit, comprising a high potential end and a low potential end; wherein, the high potential end is coupled to the low potential interface end of the primary protection circuit, and the low potential end is coupled to the high potential interface end of the secondary protection circuit; the filtering circuit is configured to perform a low-pass filtering on an electric signal inputted from the charging and discharging interface when the cell is charged via the charging and discharging interface. 
 
     
     
       15. The mobile terminal according to  claim 10 , wherein,
 the secondary protection circuit comprises a first resistor, a first capacitor, a second resistor, a second capacitor, a third resistor, a third capacitor, a voltage detection chip, a limit-voltage and limit-current fuse chip and a switch circuit; 
 a first terminal of the first resistor, a second terminal of third resistor and a second fuse pin of the limit-voltage and limit-current fuse chip are respectively configured as the high potential cell end, the low potential cell end and the high potential interface end of the secondary protection circuit, a positive voltage detection pin, a negative voltage pin, a control output pin, a power pin and a delay pin of the voltage detection chip are respectively coupled to a second terminal of the first resistor, a first terminal of the first capacitor, a second terminal of the third resistor, a controlled terminal of the switch circuit, a first terminal of the third capacitor and a first terminal of the second capacitor, each of a second terminal of the first capacitor, a second terminal of the third capacitor and a second terminal of the second capacitor is coupled to a second terminal of the third resistor, a first terminal and a second terminal of the second resistor are respectively coupled to a first fuse pin of the limit-voltage and limit-current fuse chip and the first terminal of the third capacitor, a first terminal of the third resistor is coupled to a control end of the switch circuit, a high potential end and a low potential end of the switch circuit are respectively coupled to a limit-voltage pin of the limit-voltage and limit-current fuse chip and a second terminal of the third resistor. 
 
     
     
       16. The mobile terminal according to  claim 15 , wherein,
 the switch circuit comprises a NMOS transistor; and 
 a drain electrode, a gate electrode and a source electrode of the NMOS transistor are respectively configured as the high potential end, the controlled end and the low potential end of the switch circuit. 
 
     
     
       17. The mobile terminal according to  claim 10 , wherein the charging and discharging interface is a USB interface. 
     
     
       18. An overvoltage and overcurrent protection method, comprising:
 when a cell is charged, detecting by a primary protection circuit and a secondary protection circuit, a charging voltage and a charging current in real time; 
 if a switch-off condition is satisfied, performing at least one act of: switching off a charging loop for charging the cell by the primary protection circuit through controlling a MOS transistor and switching off the charging loop by the secondary protection circuit through switching off a fuse, wherein the switch-off condition comprises at least one of: the charging voltage being greater than a preset voltage threshold, the charging current being greater than a first preset current threshold, and the cell being fully charged. 
 
     
     
       19. The overvoltage and overcurrent protection method according to  claim 18 , further comprising:
 when the cell is discharging, detecting by the primary protection circuit a discharging current of the cell through a resistor, and detecting by the second protection circuit the discharging current of the cell through the fuse; 
 if the discharging current is greater than a second preset current threshold, switching off a discharging loop by the primary protection circuit through controlling the MOS transistor; and/or switching off the discharging loop by the secondary protection circuit through switching off the fuse. 
 
     
     
       20. The overvoltage and overcurrent protection method according to  claim 18 , further comprising:
 performing a low-pass filtering on a power signal before the power signal is used to charge the cell.

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