Protecting transistor elements against degrading species

Abstract

A technique comprising: providing a stack of layers defining at least (a) source and drain electrodes, (b) gate electrode, and (c) semiconductor channel of at least one transistor; depositing one or more organic insulating layers over the stack; removing at least part of the stack in one or more selected regions by an ablation technique; depositing conductor material over the stack in at least the one or more ablated regions and one or more border regions immediately surrounding a respective ablated region; and depositing inorganic insulating material over the stack at least in the ablated regions and the border regions to cover the ablated regions and make direct contact with said conductor material in said one or more border regions all around the respective ablated region.

The invention claimed is: 
     
       1. A method comprising:
 providing a stack of layers defining at least (a) source and drain electrodes, (b) gate electrode, and (c) semiconductor channel of at least one transistor; 
 depositing one or more organic insulating layers over the stack; 
 removing at least part of the stack in one or more selected regions by an ablation technique to form one or more ablated regions; 
 depositing conductor material over the stack in at least the one or more ablated regions and one or more border regions immediately surrounding a respective ablated region; and 
 depositing inorganic insulating material over the stack at least in the ablated regions and the border regions to cover the ablated regions and make direct contact with said conductor material in said one or more border regions all around the respective ablated region; 
 wherein the method comprises providing an optical media component over said stack, and 
 wherein said optical media component extends continuously over the inorganic insulating material in the ablated regions and said one or more border regions. 
 
     
     
       2. A method according to  claim 1 , comprising patterning said deposited inorganic insulating to form islands of said inorganic insulating material, each island extending over a respective ablated region and the border region therearound. 
     
     
       3. A method according to  claim 1 , wherein said deposited conductor material provides the uppermost conductor layer conductively connected through the stack to the one or more drain electrodes of one or more transistors. 
     
     
       4. A method according to  claim 1 , wherein said deposited conductor material forms a closest conductor to said optical media component on a same side of the optical media component as said stack. 
     
     
       5. A method according to  claim 1 , comprising depositing said inorganic insulating material by atomic layer deposition. 
     
     
       6. A method according to  claim 1 , wherein the deposited inorganic insulating material has a lower water vapour transmission rate than the one or more organic insulating layers. 
     
     
       7. The method according to  claim 1 , wherein said deposited conductor material provides an array of pixel electrodes under the optical media component, and
 wherein said inorganic insulating material is retained over the whole array of the pixel electrodes between said pixel electrodes and the optical media component. 
 
     
     
       8. The method according to  claim 1 , wherein providing the optical media component comprises securing a liquid crystal display media component, or an electrophoretic media component over the stack by adhesive. 
     
     
       9. A method comprising:
 providing a stack of layers defining at least (a) source and drain electrodes, (b) gate electrode, (c) semiconductor channel of at least one transistor, and a continuous layer of inorganic insulating material between the semiconductor channel and the gate electrode; 
 depositing one or more organic insulating layers over the stack; 
 removing at least part of the stack including at least said one or more organic insulating layers and said inorganic insulating material in one or more selected regions; and 
 depositing conductor material over the stack in at least the one or more selected regions to contact at least all portions of the stack exposed by the removing step below said inorganic insulating layer. 
 
     
     
       10. A method according to  claim 9 , wherein said deposited conductor material provides one or more pixel conductors each conductively connected to a respective drain electrode within the stack to control a respective portion of an overlying optical medium. 
     
     
       11. A method according to  claim 9 , wherein the deposited inorganic insulating material has a lower water vapour transmission rate than the one or more organic insulating layers. 
     
     
       12. A method comprising:
 providing a stack of layers defining at least one of (a) the source-drain electrodes, (b) gate electrodes, and (c) semiconductor channels of an array of transistors; 
 depositing one or more organic insulating layers over the stack; and 
 depositing a barrier over the one or more organic insulating layers; 
 wherein the barrier comprises (i) one or more patterned layers of conductor material and (ii) a patterned layer of insulator material in at least regions where the one or more patterned layer of conductor material do not overlie the one or more organic insulating layers; and 
 wherein the barrier has a lower water vapour transmission rate than the one or more organic insulating layers both in regions where the patterned layer of conductor material overlies the one or more organic insulating layers and also in regions where the patterned layer of conductor material does not overlie the one or more organic insulating layers. 
 
     
     
       13. A method according to  claim 12 , wherein the stack of layers defines all of said source-drain electrodes, gate electrodes and semiconductor channels of the array of transistors, and wherein said one or more patterned layers of conductor material comprises a conductor layer defining an array of pixel conductors for the array of transistors. 
     
     
       14. A method according to  claim 13 , wherein depositing the barrier comprises: depositing said insulator material over the one or more organic insulating layers; patterning at least the deposited insulator material and the one or more organic insulating layers to define via holes exposing one or more conductors in the stack; depositing said conductor material over the patterned layers to create a conductor layer in contact with said one or more exposed conductors; and patterning the conductor layer to remove the deposited metal in selected regions and define said array of pixel conductors each in contact with a respective conductor in the stack. 
     
     
       15. A method according to  claim 13 , wherein depositing the barrier comprises: patterning at least the one or more organic insulating layers to define via holes exposing one or more conductors in the stack; depositing said conductor material over the one or more patterned layers to create a conductor layer in contact with said one or more exposed conductors; patterning the conductor layer to remove the conductor layer in selected regions and define said array of pixel conductors, each in contact with a respective conductor in the stack; depositing said insulator material over the patterned conductor layer; and patterning the layer of insulator material to expose portions of each of said pixel conductors without exposing said one or more organic insulating layers. 
     
     
       16. A method according to  claim 15 , wherein patterning the layer of insulator material comprises retaining said insulator material over the entire perimeter portion of each pixel conductor. 
     
     
       17. A method according to  claim 16 , further comprising depositing a layer of further conductor material over the patterned layer of insulator material for contact with the exposed portions of the pixel conductors; and patterning the deposit of further conductor material so as to form an array of upper pixel conductors, each upper pixel conductor in contact with a respective lower pixel conductor. 
     
     
       18. A method according to  claim 15 , further comprising depositing a planarisation layer over the patterned conductor layer and patterning the planarisation layer to expose a portion of each pixel conductor, before depositing said insulator material; and wherein patterning said layer of insulator material comprises not exposing the patterned planarisation layer. 
     
     
       19. A method according to  claim 12 , wherein the stack of layers defines both said source-drain electrodes and said semiconductor channels; and wherein said one or more patterned layers of conductor material comprises a patterned layer defining the gate electrodes for said array of transistors and a patterned layer defining an array of pixel conductors for the array of transistors. 
     
     
       20. A method according to  claim 12  comprising providing an optical media component over the barrier.