Method and apparatus for coordinated multipoint receiver processing acceleration and latency reduction

Abstract

Methods and apparatus for coordinated multipoint receiver processing acceleration and latency reduction. In an exemplary embodiment, an apparatus includes a receiver that receives symbols from a wireless transmission and stores the symbols in a memory. The receiver also outputs an indicator that indicates that storage of the symbols in the memory has begun. The apparatus also includes a controller that outputs control signaling in response to the indicator. The apparatus also includes a link that acquires the symbols and remote scheduling and control information (RSCI) from the memory in response to receiving the control signaling. The link combines the symbols with the RSCI to form packets and transmits the packets to an external system.

What is claimed is: 
     
       1. An apparatus, comprising:
 a receiver that receives symbols from a wireless transmission and stores the symbols in a memory, and wherein the receiver outputs an indicator that indicates that storage of the symbols in the memory has begun; 
 a controller that outputs control signaling in response to the indicator; 
 a link, which is a circuit containing a controller and a transceiver, that acquires the symbols and remote scheduling and control information (RSCI) from the memory in response to receiving the control signaling, wherein the link combines the symbols with the RSCI to form packets, and wherein the link transmits the packets to an external system, wherein the apparatus forms a first baseband processing system and wherein the external system forms a second baseband processing system; and 
 a second link at the second baseband processing system, wherein the second link receives the packets and separates the symbols and the RSCI from the packets, and wherein the second link transfers at least a portion of the RSCI to a second controller located at the second baseband processing system and stores the symbols in a second memory located at the second baseband processing system. 
 
     
     
       2. The apparatus of  claim 1 , wherein a latency time interval measured from the indicator to a start of transmission of the packets from the link is approximately one microsecond or less. 
     
     
       3. The apparatus of  claim 1 , wherein the RSCI is stored in the memory prior to receiving the symbols. 
     
     
       4. The apparatus of  claim 1 , further comprising a direct connection between the memory and the link, and wherein the link acquires the symbols from the memory over the direct connection. 
     
     
       5. The apparatus of  claim 1 , further comprising a data bus between the memory and the link, and wherein the link acquires the symbols from the memory over the data bus. 
     
     
       6. The apparatus of  claim 1 , wherein the link transmits the packets to the external system over a high-speed channel. 
     
     
       7. The apparatus of  claim 1 , further comprising a second link at the second baseband processing system, wherein the second link receives the packets and separates the symbols and the RSCI from the packets, and wherein the second link transfers at least a portion of the RSCI to a second controller located at the second baseband processing system and stores the symbols in a second memory located at the second baseband processing system. 
     
     
       8. The apparatus of  claim 1 , further comprising a second direct connection that connects the second link and the second memory, and wherein the second link transfers the symbols to the second memory over the second direct connection. 
     
     
       9. The apparatus of  claim 1 , further comprising a second receiver located at the second baseband processing system that receives a second version of the symbols from the wireless transmission and stores the second version of the symbols in the second memory. 
     
     
       10. The apparatus of  claim 9 , wherein the symbols represent a first version of the symbols, and wherein a latency time interval between storing a selected symbol of the second version of the symbols in the second memory and storing the selected symbol of the first version of the symbols in the second memory is less than one symbol time. 
     
     
       11. The apparatus of  claim 1 , wherein the second baseband processing system processes at least one of the first and second versions of the symbols according to the at least a portion of the RSCI. 
     
     
       12. The apparatus of  claim 1 , wherein the first baseband processing system and the second processing system are formed as system-on-chip (SOC) devices. 
     
     
       13. A method, comprising:
 receiving symbols from a wireless transmission; 
 storing the symbols in a memory; 
 signaling that the symbols are available in the memory; 
 acquiring the symbols and remote scheduling control information RSCI in response to the signaling; 
 combining the symbols with the RSCI to form packets; and 
 transmitting the packets to an external system, wherein the method is performed at a first baseband processing system and wherein the external system forms a second baseband processing system; 
 receiving, at the second baseband processing system, the packets; 
 separating the symbols and the RSCI from the packets; 
 storing the symbols in a second memory located at the second baseband processing system; 
 extracting command information from the RSCI; and 
 processing the symbols based on the command information. 
 
     
     
       14. The method of  claim 13 , wherein a latency time interval measured from a start of the operation of storing to a start of the operation of transmitting is less than one microsecond. 
     
     
       15. The method of  claim 13 , wherein the operations performed at the second baseband processing system further comprise:
 receiving a second version of the symbols from the wireless transmission; and 
 storing the second version of the symbols in the second memory. 
 
     
     
       16. The method of  claim 15 , wherein the operations performed at the second baseband processing system further comprise processing the symbols and the second version of the symbols according to the RSCI. 
     
     
       17. The method of  claim 15 , wherein a latency time interval between storing a selected symbol of the symbols in the second memory and storing the selected symbol of the second version of the symbols in the second memory is less than one symbol time.