Onboard electronic control unit

Abstract

A downlink communication data DND from a main control circuit section to a combination control circuit section is divided into first and second downlink data, high-speed communication using a downlink clock signal and a transmission start instruction signal is performed, a high-speed load which has been directly driven from the main control circuit section is indirectly driven at high speed from the combination control circuit section by the first downlink data, a low-speed analog input signal ANL which has been indirectly inputted to the combination control circuit section is inputted to a specific input channel of a multi-channel converter through an indirect multiplexer, and channel selection is made by the downlink communication data.

The invention claimed is: 
     
       1. An onboard electronic circuit unit comprising:
 a main control circuit section comprising a microprocessor; and 
 a combination control circuit section that is provided separately from the main circuit control circuit section, controls a plurality of first electrical loads that is directly connected to the main control circuit section, and controls a plurality of second electrical loads that is indirectly connected to the combination control circuit section in accordance with respective operation states of direct input signals and indirect input signals, the direct input being provided to the main control circuit section without control of the combination circuit section, the indirect input signals being provided to the main control circuit section under the control of the combination control circuit section, wherein: 
 a downlink communication data transmitted from the main control circuit section to the combination control circuit section includes a first downlink data with a fixed address and a second downlink data with a variable address, 
 a pair of the first downlink data and the second downlink data is periodically transmitted based on a transmission start instruction signal and a downlink clock signal generated by the main control circuit section, 
 among the plurality of second electrical loads, a predetermined high-speed load periodically receives a high-speed indirect drive control signal including the first downlink data, so that the predetermined high-speed load is to be controlled at a predetermined high frequency, 
 among the plurality of first electrical loads, an indirect load receives a low-speed indirect drive control signal including the second downlink data, so that the indirect load is to be controlled at a predetermined low frequency, 
 a transmission target of the second downlink data is changeable by a designated address every time the second downlink data is transmitted, 
 in response to determining that signals of the first downlink data are available based on comparison between a number of the signals of the first downlink data and a number of loads of the high-speed load, the indirect load is controlled by the first downlink data, 
 the main control circuit section further includes a high-speed analog-to-digital (AD) converter to which a high-speed analog sensor outputting the direct input signals is connected and a multi-channel AD converter to which a medium-speed analog sensor is connected, 
 the onboard electronic circuit unit further comprises:
 a low-speed analog sensor that outputs the indirect input signals and is connected to the multi-channel AD converter or the high-speed AD converter through an indirect multiplexer; and 
 a medium-speed analog sensor and a low-speed analog sensor that are connected to the high-speed AD converter through an extended indirect multiplexer, and 
 
 the indirect multiplexer or the extended indirect multiplexer selects one of a plurality of analog input channels based on selection data transmitted from a selection register in the combination control circuit section. 
 
     
     
       2. The onboard electronic circuit unit according to  claim 1 , wherein
 the main control circuit section performs drive control of the plurality of first electrical loads and the second electrical loads directly or indirectly through the combination control circuit section in accordance with on/off states of a plurality of opening/closing sensors and signal voltage levels of a plurality of analog sensors, 
 the combination control circuit section comprises a logic control circuit or an auxiliary microprocessor, 
 the plurality of opening/closing sensors include a direct opening/closing sensor that directly communicates with the main control circuit section and an indirect opening/closing sensor that indirectly communicates with the main control circuit section in association with the combination control circuit section, 
 the plurality of analog sensors include the high-speed analog sensor that directly communicates with the main control circuit section, the low-speed analog sensor that indirectly communicates with the main control circuit section in association with the combination control section and the medium-speed analog sensor, 
 variation in signal voltage levels of the medium-speed analog sensor is less than variation in signal voltage levels of the high-speed analog sensor and greater than variation in signal voltage levels of the low-speed analog sensor, 
 the medium-speed analog sensor directly communicates with the main control circuit section or indirectly communicates with the main control section in association with the combination control circuit section, 
 while the main control circuit section transmits the downlink communication data in series to a plurality of registers provided in the combination control circuit section through a first parallel-to-serial (PS) converter and a first serial-to-parallel (SP) converter, the combination control circuit section transmits uplink communication data in series to the main control circuit section through a second PS converter and a second SP converter, 
 the first downlink data is a write-only command transmitted to a high-speed output register in a specific address area in the plurality of registers, 
 the specific address area in the plurality of registers includes on/off data of plural bits to be carried in a high-speed indirect drive control signal, 
 the predetermined high-speed load is indirectly driven by the on/off data at a speed higher than a predetermined speed value, 
 the second downlink data includes
 command data, 
 address data, and 
 writing on/off data, 
 
 the writing on/off data includes
 a low-speed indirect drive control signal DOC to a low-speed output register designated by the address data, or 
 numeral data as control constants to be set in a constant setting register, in response to the command data being a write instruction, 
 
 the indirect load is indirectly driven by the low-speed indirect drive control signal, and 
 a response to on/off signals which are outputted by the indirect opening/closing sensor is transmitted from the combination control circuit section to the main control circuit section by the uplink communication data. 
 
     
     
       3. The onboard electronic circuit unit according to  claim 2 , wherein
 based on the selection data, the selection register selects a signal from a plurality of low-speed analog input signals inputted from the low-speed analog sensor by the indirect multiplexer and inputs the signal into a specific input channel of the multi-channel AD converter or the high-speed AD converter provided in the main control circuit section, 
 the multi-channel AD converter is a successive conversion type converter including a built-in multiplexer to operate as a selection switching circuit of plural input channels, and medium-speed analog input signals are inputted to respective input channels of the multi-channel AD converter or the high-speed AD converter other than the specific input channel, 
 the high-speed AD converter includes AD converters and buffer memories, wherein the AD converters and buffer memories are associated with one channel or a plurality of input channels respectively, and 
 the high-speed analog input signals are inputted from the high-speed analog sensor to respective input channels of the multi-channel AD converter or the high-speed AD converter other than the specific input channel. 
 
     
     
       4. The onboard electronic circuit unit according to  claim 2 , wherein
 based on the selection data, the selection register selects a signal from a plurality of medium-speed analog input signals inputted from the medium-speed analog sensor as the indirect input signals by the extended indirect multiplexer or a post-stage multiplexer, and inputs the signal into a specific input channel of the high-speed AD converter provided in the main control circuit section, 
 plural low-speed analog input signals inputted from the low-speed analog sensor are inputted to a specific input channel of the high-speed AD converter through the extended indirect multiplexer, or inputted to the specific input channel of the high-speed AD converter via prescribed channels of a previous-stage multiplexer and the post-stage multiplexer, and 
 the high-speed AD converter includes AD converters and buffer memories so as to correspond to one channel or plural input channels, and 
 the high-speed analog input signals are inputted from the high-speed analog sensor to respective input channels of the multi-channel AD converter or the high-speed AD converter other than the specific input channel. 
 
     
     
       5. The onboard electronic circuit unit according to  claim 2 ,
 wherein the combination control circuit section further includes an input gate to which the on/off signals inputted from the indirect opening/closing sensor are inputted, 
 the uplink communication data further includes the on/off signals of the indirect opening/closing sensor obtained from the input gate, 
 input terminals of the low-speed analog sensor and input terminals of the indirect opening/closing sensor are individually provided, or at least part of the input terminals of the low-speed analog sensor and the input terminals of the indirect opening/closing sensor are common terminals. 
 
     
     
       6. The onboard electronic circuit unit according to  claim 5 , wherein
 any one of the on/off signals from the indirect opening/closing sensor and low-speed analog inputs from the low-speed analog sensor is transmitted to the common terminals, 
 the microprocessor monitors digital conversion values with respect to output signal voltages of analog input channels to which the on/off signals are inputted, determines that an on/off signal of the on/off signals indicates an on-state in response to a corresponding digital conversion value of the digital conversion values being greater than or equal to a second threshold which is higher than a first threshold, and determines that the on/off signal indicates an off-state in response to the corresponding digital conversion value being less than or equal to the first threshold. 
 
     
     
       7. The onboard electronic circuit unit according to  claim 2 , wherein
 the command data included in the second downlink data further includes at least one of a register batch read instruction, an uplink reply stop instruction and an register address unit read instruction, 
 the register batch read instruction is a read instruction for retrieving contents from the plurality of registers in a prescribed order, without referring to the address data, 
 the register address unit read instruction is a read instruction for retrieving the contents from a register of the plurality of registers, the register having a designated address indicated in the address data, 
 in response to the register address unit read instruction being generated in an uplink communication period in which batch reading is performed by the register batch read instruction, an uplink reply is suspended and the register address unit read instruction is executed and started after data which has been already retrieved is made valid in the main control circuit section, and 
 the uplink reply stop instruction is an instruction for suspending the uplink reply and making the data which has been already retrieved valid in the main control circuit section. 
 
     
     
       8. The onboard electronic circuit unit according to  claim 7 ,
 wherein the constant setting register provided in the combination control circuit section further includes an abnormality data register, and the abnormality data register stores abnormality data in response to an abnormality in disconnection or short-circuit occurring in part of input/output wiring, or in response to an abnormality in downlink communication determined based on code inspection data added to the second downlink data occurs, 
 the communication control circuit section generates a read request signal by a dedicated line with respect to the main control circuit section in response to the abnormality data being stored in the abnormality data register, and 
 the main control circuit section generates the register batch read instruction or the register address unit read instruction by receiving the read request signal. 
 
     
     
       9. The onboard electronic circuit unit according to  claim 7 ,
 wherein the combination control circuit section includes a question register for storing plural question data for periodically monitoring an operation state of the main control circuit section, an answer register for storing answer data from the main control circuit section with respect to the question register, and a correct answer data register storing answer data corresponding to respective question data, 
 the uplink communication data includes the question data, and the downlink communication data includes the answer data generated by the main control circuit section so as to correspond to the question data, 
 in the question data, one of plural types of question data stored in the question register is selected and adopted, and the question data is common question data with respect to the uplink communication data, 
 the combination control circuit section compares the answer data stored in the answer register with contents of the correct answer data register corresponding to current contents of the question register before changing contents of plural question data to thereby determine presence of an abnormality in control by the main control circuit section, and 
 in the question data, question contents are updated and changed after a prescribed waiting time for the answer data, and determination of abnormality in communication is made by the combination control circuit section in response to an elapsed time from a previous update and change to a present update and change exceeding a prescribed time. 
 
     
     
       10. The onboard electronic circuit unit according to  claim 2 ,
 wherein the command in the second downlink data further includes an invalid instruction, and in response to the command data being the invalid instruction, the address data in the second downlink data and data in association with the address data are ignored in the combination control circuit section. 
 
     
     
       11. The onboard electronic circuit unit according to  claim 2 , wherein
 the plurality of first electrical loads further include a direct load which is directly driven by a direct drive control signal generated by the main control circuit section, 
 the direct load is a motor that controls a throttle valve opening position, 
 the main control circuit section performs a negative feedback control of the motor in accordance with output signals of an acceleration position sensor and a throttle position sensor which correspond to the medium-speed analog sensors, 
 the predetermined high-speed load is an electromagnetic coil for driving an solenoid valve for fuel injection or an ignition coil in a multi-cylinder onboard engine, 
 the predetermined high-speed load performs drive and stop control on a crank shaft, in accordance with a crank angle sensor corresponding to the direct opening/closing sensor, so that an angle error of the crank shaft is within a range of 1 degree or less, 
 the indirect load is a motor for a pump, an electromagnetic clutch, auxiliary machines including the solenoid valve, a heater for exhaust gas, or an electromagnetic relay for a load power supply, and 
 a transmission period of the downlink communication data is 2 μsec to 5 μsec, and 
 a reply period of the uplink communication data is 2 μsec to 5 μsec. 
 
     
     
       12. The onboard electronic circuit unit according to  claim 11 , wherein
 the high-speed analog sensor is a knock sensor for measuring vibration sound of an engine, and 
 a digital conversion time required for the high-speed AD converter or the multi-channel AD converter to convert a single analog input signal to a digital output signal is less than or equal to a single transmission time of the downlink communication data.