Liquid crystal display
Abstract
A liquid crystal display includes: a gate line extending in a first direction; a first data line and a second data line extending in a second direction; a thin film transistor (TFT) including a gate electrode connected to the gate line, a source electrode connected to the first data line, and a drain electrode; a vertical storage electrode line extending between the first and second data lines; a passivation layer disposed on the TFT and the vertical storage electrode line; an insulating layer disposed on the passivation layer; and a subpixel electrode disposed on the insulating layer, connected to the drain electrode, wherein the vertical storage electrode line includes an expansion, the insulating layer includes an opening exposing a portion of the passivation layer overlapping the expansion, and wherein the subpixel electrode includes a protrusion overlapping the expansion, a reinforced storage capacitor being formed between the protrusion and the expansion.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A liquid crystal display, comprising:
a gate line extending in a first direction;
a first data line extending in a second direction different from the first direction;
a second data line extending in the second direction;
a first thin film transistor comprising a first gate electrode connected to the gate line, a first source electrode connected to the first data line, and a first drain electrode;
a second thin film transistor comprising a second gate electrode connected to the gate line, a second source electrode connected to the first data line, and a second drain electrode;
a third thin film transistor comprising a third gate electrode connected to the gate line, a third source electrode connected to the second drain electrode, and a third drain electrode;
a vertical storage electrode line extending between the first data line and the second data line, the vertical storage electrode line being connected to the third drain electrode;
a horizontal storage electrode line;
a passivation layer disposed on the first thin film transistor, the second thin film transistor, the third thin film transistor, and the vertical storage electrode line;
a color filter layer disposed on the passivation layer, the color filter layer comprising a color filter and a light blocking member;
a first subpixel electrode disposed on the color filter and the light blocking member of the color filter layer and connected to the first drain electrode; and
a second subpixel electrode disposed on the color filter layer and connected to the second drain electrode,
wherein the first subpixel electrode and the horizontal storage electrode line forms a first storage capacitor, and the second subpixel electrode and the horizontal storage electrode line forms a second storage capacitor,
wherein the vertical storage electrode line comprises a first expansion adjacent to the gate line,
wherein the light blocking member comprises a first opening exposing a portion of the passivation layer, the portion of the passivation layer overlapping the first expansion,
wherein the second subpixel electrode comprises a first protrusion overlapping the first expansion in the first opening in a plan view, a reinforced storage capacitor being formed between the first protrusion and the first expansion, and
wherein the horizontal storage electrode line and the vertical storage electrode line are insulated from each other.
2. The liquid crystal display of claim 1 , wherein:
the vertical storage electrode line is disposed in the same layer as the first data line and the second data line.
3. The liquid crystal display of claim 2 , wherein:
the vertical storage electrode line is configured to transfer a determined voltage.
4. The liquid crystal display of claim 1 , wherein:
the reinforced storage capacitor is disposed between the gate line and the third thin film transistor.
5. The liquid crystal display of claim 4 , wherein:
the color filter layer includes an organic material.
6. The liquid crystal display of claim 4 , wherein:
the first expansion is connected to the third drain electrode.
7. The liquid crystal display of claim 6 , wherein:
the third gate electrode comprises a depression corresponding to the first expansion.
8. The liquid crystal display of claim 4 , further comprising:
a voltage transfer line disposed in the same layer as the first subpixel electrode and the second subpixel electrode, the voltage transfer line overlapping and extending along the second data line.
9. The liquid crystal display of claim 8 , wherein:
the vertical storage electrode line further comprises a second expansion facing the first expansion, the gate line being disposed between the first expansion and the second expansion;
the passivation layer comprises a contact hole exposing the second expansion; and
the voltage transfer line comprises a second protrusion connected to the second expansion via the contact hole.
10. The liquid crystal display of claim 9 , wherein:
the vertical storage electrode line is curved at least once around an edge of the first subpixel electrode; and
the vertical storage electrode line is curved at least once around an edge of the second subpixel electrode.
11. The liquid crystal display of claim 9 , further comprising:
at least one microcavity facing the first and second subpixel electrodes, the microcavity comprising liquid crystal molecules; and
an opposing electrode facing the first and second subpixel electrodes, the microcavity being disposed between the opposing electrode and the first and second subpixel electrodes,
wherein the opposing electrode is connected to the voltage transfer line at or near an edge of the microcavity.
12. The liquid crystal display of claim 11 , wherein:
the opposing electrode comprises a first portion spaced apart from a second portion, the gate line being disposed between the first and second portions of the opposing electrode.
13. The liquid crystal display of claim 12 , further comprising:
a roof layer disposed on the opposing electrode,
wherein the roof layer faces the first and second subpixel electrodes, and
wherein the microcavity is disposed between the roof layer and the first and second subpixel electrodes.
14. The liquid crystal display of claim 1 , wherein:
the gate line is disposed between the reinforced storage capacitor and the third thin film transistor.
15. The liquid crystal display of claim 14 , wherein:
the first protrusion comprises a first portion crossing the gate line; and
the vertical storage electrode line comprises a second portion overlapping and extending along the first portion.
16. The liquid crystal display of claim 15 , wherein:
a width of the second portion is greater than a width of the first portion.
17. The liquid crystal display of claim 14 , wherein:
the vertical storage electrode line is curved at least once around an edge of the first subpixel electrode; and
the vertical storage electrode line is curved at least once around an edge of the second subpixel electrode.
18. The liquid crystal display of claim 14 , further comprising:
an opposing electrode facing the first and second subpixel electrodes; and
a liquid crystal layer disposed between the opposing electrode and the first and second subpixel electrodes.
19. A liquid crystal display, comprising:
a gate line extending in a first direction;
a first data line extending in a second direction different from the first direction;
a second data line extending in the second direction;
a first thin film transistor comprising a first gate electrode connected to the gate line, a first source electrode connected to the first data line, and a first drain electrode;
a second thin film transistor comprising a second gate electrode, a second source electrode, and a second drain electrode, the second source electrode connected to the first drain electrode;
a first storage electrode line;
a second storage electrode line extending between the first data line and the second data line, the second storage electrode line being connected to the second drain electrode and configured to transfer a determined voltage;
a passivation layer disposed on the first thin film transistor, the second thin film transistor, and the second storage electrode line;
a color filter layer disposed on the passivation layer, the color filter layer comprising a color filter and a light blocking member; and
a subpixel electrode disposed on the color filter layer, the subpixel electrode being connected to the first drain electrode,
wherein the subpixel electrode and the first storage electrode line forms a storage capacitor,
wherein the second storage electrode line comprises an expansion adjacent to the gate line,
wherein the light blocking member comprises an opening exposing a portion of the passivation layer, the portion of the passivation layer overlapping the expansion,
wherein the subpixel electrode comprises a protrusion overlapping the expansion in the opening in a plan view, a reinforced storage capacitor being formed between the protrusion and the expansion, and
wherein the horizontal storage electrode line and the vertical storage electrode line are insulated from each other.Cited by (0)
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