US10447145B1ActiveUtility

SMPS power-on with energy saver

73
Assignee: ST MICROELECTRONICS GRENOBLE 2Priority: Nov 19, 2018Filed: Nov 19, 2018Granted: Oct 15, 2019
Est. expiryNov 19, 2038(~12.4 yrs left)· nominal 20-yr term from priority
H02M 3/158H02M 3/1588H02M 1/36H02M 2001/0032Y02B70/10H02M 1/0032H02M 1/0003H02M 3/156
73
PatentIndex Score
3
Cited by
20
References
20
Claims

Abstract

In an embodiment, a method for soft-starting an SMPS includes: asserting an enable signal; disabling an output stage of the SMPS; after asserting the enable signal, measuring a feedback voltage of the SMPS; receiving a first reference voltage at an input reference node; comparing the measured feedback voltage with the first reference voltage; and, when the measured feedback voltage is lower than the first reference voltage, storing the feedback voltage in a soft-start capacitor, connecting an output reference node to the soft-start capacitor, enabling the output stage of the SMPS, and switching a transistor of the output stage to regulate the output voltage based on the feedback voltage and a second reference voltage at the output reference node, and injecting a current into the soft-start capacitor.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method for soft-starting a switched-mode power supply (SMPS), the method comprising:
 asserting an enable signal, wherein the SMPS is activated or deactivated based on the enable signal; 
 disabling an output stage of the SMPS; 
 after asserting the enable signal, measuring a feedback voltage of the SMPS, the feedback voltage being based on an output voltage of the SMPS; 
 receiving a first reference voltage at an input reference node; comparing the measured feedback voltage with the first reference voltage; 
 and when the measured feedback voltage is lower than the first reference voltage: storing the feedback voltage in a soft-start capacitor, 
 connecting an output reference node to the soft-start capacitor, 
 enabling the output stage of the SMPS and switching a transistor of the output stage to regulate the output voltage based on the feedback voltage and 
 a second reference voltage at the output reference node, and injecting a current into the soft-start capacitor, 
 when the measured feedback voltage is higher than the first reference voltage, connecting the input reference node to the output reference node, 
 waiting until the feedback voltage decreases to a voltage lower than the first reference voltage, and 
 when the feedback voltage becomes lower than the first reference voltage, enabling the output stage of the SMPS and switching the transistor of the output stage to regulate the output voltage based on the feedback voltage and the second reference voltage. 
 
     
     
       2. The method of  claim 1 , further comprising receiving the first reference voltage from a bandgap circuit. 
     
     
       3. The method of  claim 1 , wherein the feedback voltage is lower than the output voltage. 
     
     
       4. The method of  claim 3 , wherein the transistor is a transistor of a half-bridge of the SMPS. 
     
     
       5. The method of  claim 4 , wherein disabling the SMPS comprises turning off the transistor and a second transistor of the half-bridge. 
     
     
       6. The method of  claim 1 , further comprising asserting and deasserting the enable signal every 300 ms or faster. 
     
     
       7. The method of  claim 1 , further comprising pulling up the output voltage when the SMPS is deactivated. 
     
     
       8. A circuit comprising:
 an input terminal configured to receive an input voltage; 
 an output terminal configured to be coupled to an inductor and an output capacitor; 
 a feedback terminal configured to be coupled to the output capacitor; 
 an output stage coupled to the output terminal; 
 a controller configured to regulate an output voltage at the output capacitor based on a first reference voltage and a feedback voltage of the feedback terminal; and 
 a soft-start circuit comprising an output reference terminal configured to provide the first reference voltage, an input reference terminal configured to receive a second reference voltage, a soft-start capacitor, a first switch coupled between the input reference terminal and the output reference terminal, and a second switch coupled between the soft-start capacitor and the feedback terminal, and a third switch coupled between the soft-start capacitor and the output reference terminal, wherein, when an enable signal transitions from a first state to a second state, the soft-start circuit is configured to:
 disable the output stage, 
 determine the feedback voltage, 
 compare the determined feedback voltage with the second reference voltage, and 
 when the determined feedback voltage is lower than the second reference voltage:
 close the second switch to store the feedback voltage in the soft-start capacitor, 
 close the third switch, 
 enable the output stage, and 
 inject a current into the soft-start capacitor. 
 
 
 
     
     
       9. The circuit of  claim 8 , wherein the soft-start circuit is further configured to, when the determined feedback voltage is higher than the second reference voltage,
 close the first switch to provide the second reference voltage to the output reference terminal, 
 wait until the feedback voltage decreases to a voltage lower than the second reference voltage, and 
 enable the output stage when the feedback voltage becomes lower than the second reference voltage. 
 
     
     
       10. The circuit of  claim 8 , wherein the soft-start circuit is further configured to, when the determined feedback voltage is lower than the second reference voltage, provide the second reference voltage at the output reference terminal after a voltage of the soft-start capacitor reaches the second reference voltage. 
     
     
       11. The circuit of  claim 8 , wherein the soft-start circuit further comprises a current source and a fourth switch coupled between the current source and the soft-start capacitor, wherein the soft-start circuit is configured to inject the current into the soft-start capacitor by closing the fourth switch. 
     
     
       12. The circuit of  claim 8 , wherein the soft-start circuit further comprises:
 a comparator having a first input coupled to the input reference terminal, and a second input coupled to the feedback terminal; and 
 a flip-flop having an input coupled to an output of the comparator and a second input configured to receive a first signal, wherein the soft-start circuit is configured to compare the feedback voltage with the second reference voltage by asserting the first signal. 
 
     
     
       13. The circuit of  claim 12 , wherein the flip-flop is a D-flip-flop and the second input of the flip-flop is a clock input. 
     
     
       14. The circuit of  claim 8 , further comprising the inductor and the output capacitor, wherein the output terminal is coupled to the inductor and the output capacitor. 
     
     
       15. The circuit of  claim 14 , further comprising a first resistor coupled between the output capacitor and the feedback terminal, and a second resistor coupled between the feedback terminal and a reference terminal. 
     
     
       16. The circuit of  claim 8 , wherein the output stage comprises a half-bridge. 
     
     
       17. A buck converter comprising:
 a first supply terminal and a second supply terminal configured to be coupled to a power source; 
 an output terminal; 
 an inductor coupled to the output terminal; 
 an output capacitor coupled between the inductor and the second supply terminal; 
 a feedback terminal coupled to the output capacitor; 
 an output stage coupled to the output terminal, the output stage comprising a half-bridge coupled to the output terminal, and a gate driver circuit coupled to the half-bridge; 
 a ramp generator; 
 an error amplifier having a first input configured to receive a first reference voltage and a second input coupled to the feedback terminal; 
 a pulse-width modulation (PWM) controller having an output coupled to the output stage and configured to regulate an output voltage at the output capacitor based on an output of the error amplifier and an output of the ramp generator; and 
 a soft-start circuit comprising an output reference terminal configured to provide the first reference voltage, an input reference terminal configured to receive a second reference voltage, a soft-start capacitor, a first switch coupled between the input reference terminal and the output reference terminal, a second switch coupled between the soft-start capacitor and the feedback terminal, and a third switch coupled between the soft-start capacitor and the output reference terminal, wherein, when an enable signal transitions from a first state to a second state, the soft-start circuit is configured to:
 disable the output stage, 
 determine a feedback voltage at the feedback terminal, 
 compare the determined feedback voltage with the second reference voltage, and 
 when the determined feedback voltage is lower than the second reference voltage:
 close the second switch to store the feedback voltage in the soft-start capacitor, 
 close the third switch, 
 enable the output stage, and 
 inject a current into the soft-start capacitor. 
 
 
 
     
     
       18. The buck converter of  claim 17 , wherein the soft-start circuit is furthered configured to, when the determined feedback voltage is higher than the second reference voltage,
 close the first switch to provide the second reference voltage to the output reference terminal, 
 wait until the feedback voltage decreases to a voltage lower than the second reference voltage, and 
 when the feedback voltage becomes lower than the second reference voltage, enable the output stage. 
 
     
     
       19. The buck converter of  claim 17 , further comprising the power source, wherein the power source is a battery. 
     
     
       20. A method for soft-starting a switched-mode power supply (SMPS), the method comprising:
 asserting an enable signal, wherein the SMPS is activated or deactivated based on the enable signal; 
 disabling an output stage of the SMPS; 
 after asserting the enable signal, measuring a feedback voltage of the SMPS, the feedback voltage being based on an output voltage of the SMPS; 
 receiving a first reference voltage at an input reference node; 
 comparing the measured feedback voltage with the first reference voltage; 
 when the measured feedback voltage is lower than the first reference voltage:
 storing the feedback voltage in a soft-start capacitor, 
 connecting an output reference node to the soft-start capacitor, 
 enabling the output stage of the SMPS and switching a transistor of the output stage to regulate the output voltage based on the feedback voltage and a second reference voltage at the output reference node, and 
 injecting a current into the soft-start capacitor; and 
 when the measured feedback voltage is lower than the first reference voltage, connecting the input reference node to the output reference node after a voltage of the soft-start capacitor reaches the first reference voltage.

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