Driver assisted by charge sharing

Abstract

A device, including a switch configured to couple a current source with an output terminal upon receipt of a data signal, is provided. The device also includes a first variable capacitor coupled in parallel to the current source at a common node on a source terminal of the switch, wherein the first variable capacitor comprises multiple capacitive elements coupled in parallel and configured to be activated by a programmable signal, and wherein the programmable signal is selected to increase a charge transfer rate from an output terminal coupled to a load, when the switch is turned on. A system and a serial interface including the above device are also provided.

The invention claimed is: 
     
       1. A device, comprising:
 a switch configured to couple a current source with an output terminal upon receipt of a data signal; and 
 a first variable capacitor coupled in parallel to the current source at a common node on a source terminal of the switch, wherein the first variable capacitor comprises multiple capacitive elements coupled in parallel and configured to be activated by a programmable signal, and wherein the programmable signal is selected to increase a charge transfer rate from an output terminal coupled to a load, when the switch is turned on. 
 
     
     
       2. The device of  claim 1 , wherein the switch comprises at least one of a negative channel field effect transistor or a positive channel field effect transistor. 
     
     
       3. The device of  claim 1 , wherein the multiple capacitive elements comprise at least one field effect transistor coupled in series with a capacitor, and the programmable signal comprises a bit signal to a gate of the field effect transistor. 
     
     
       4. The device of  claim 1 , wherein the current source comprises a sink terminal of an auxiliary current source configured to maintain a voltage of the common node at a fixed value when a current lower than a bias current is provided to a load. 
     
     
       5. The device of  claim 1 , wherein the current source comprises a source terminal of a main current source configured to provide a current through a resistor having a first terminal at an output node and a second terminal at the common node, the current flowing from the first terminal to the second terminal to induce a current lower than a bias current through a load coupled in parallel with the source terminal. 
     
     
       6. The device of  claim 1 , wherein the current source comprises a source terminal of an auxiliary current source configured to maintain a voltage of the common node at a fixed value when a current higher than a bias current is provided to a load. 
     
     
       7. The device of  claim 1 , wherein the current source comprises a sink terminal of a main current source configured to provide a current through a resistor having a first terminal at the common node and a second terminal at an output node, the current flowing from the first terminal to the second terminal configured to induce a current higher than a bias current through a load. 
     
     
       8. The device of  claim 1 , further comprising a second variable capacitor coupled in parallel to a source terminal of a main current source, wherein the second variable capacitor comprises multiple capacitive elements coupled in parallel and configured to be activated by a programmable signal, and wherein the programmable signal is selected to increase a charge transfer rate from the output terminal when a second switch activates the source terminal of the main current source. 
     
     
       9. The device of  claim 1 , wherein a capacitance of the first variable capacitor is adjusted based on a slew rate of a load coupled to the current source. 
     
     
       10. The device of  claim 1 , wherein a capacitance of the first variable capacitor is adjusted based on a rising slew rate of a load coupled to the current source, and on a falling slew rate of the load. 
     
     
       11. A system, comprising:
 a light emitting device; 
 a data channel configured to provide a data signal; 
 a switch configured to couple a current source with the light emitting device upon receipt of the data signal; and 
 a first variable capacitor coupled in parallel to the current source at a common mode node on a source terminal of the switch, wherein the first variable capacitor comprises a plurality of capacitive elements coupled in parallel and configured to be activated by a programmable signal, and wherein the programmable signal is selected to increase a slew rate from the light emitting device when the switch is turned on and when the switch is turned off. 
 
     
     
       12. The system of  claim 11 , further comprising a processor configured to provide the programmable signal to improve a slew rate of the light emitting device. 
     
     
       13. The system of  claim 11 , wherein the light emitting device comprises a load having a slew rate that defines an eye opening pattern in a bit-error rate diagram. 
     
     
       14. The system of  claim 11 , wherein a capacitance of the first variable capacitor is adjusted based on a slew rate of a load coupled to the current source and a bit-error rate of an output signal from the light emitting diode. 
     
     
       15. A serial interface, comprising:
 an opto-electronic data link, comprising: 
 a light emitting device configured to convert an electric input signal into an optical output signal; 
 a data channel configured to provide the electric input signal; 
 a switch configured to couple a current source with the light emitting device upon receipt of the electric input signal; and 
 a variable capacitor coupled in parallel to the current source at a common node on a source terminal of the switch, wherein the variable capacitor comprises multiple capacitive elements coupled in parallel and configured to be activated by a programmable signal, and wherein the programmable signal is selected to reduce a bit error rate between the electric input signal and the optical output signal. 
 
     
     
       16. The serial interface of  claim 15 , further comprising a processor configured to provide the programmable signal according to a bit error rate measured for the optical output signal. 
     
     
       17. The device of  claim 15 , wherein the switch comprises at least one of a negative channel field effect transistor or a positive channel field effect transistor. 
     
     
       18. The device of  claim 15 , further comprising a second variable capacitor coupled in parallel to a source terminal of a main current source, wherein the second variable capacitor comprises multiple capacitive elements coupled in parallel and configured to be activated by a programmable signal, and wherein the programmable signal is selected to differentially increase a rising slew rate and a falling slew rate of an optical signal from the light emitting diode. 
     
     
       19. The device of  claim 15 , wherein the multiple capacitive elements comprise at least one field effect transistor coupled in series with a capacitor, and the programmable signal comprises a bit signal to a gate of the field effect transistor. 
     
     
       20. The device of  claim 15 , wherein the current source comprises a sink terminal of an auxiliary current source configured to maintain a voltage of the common node at a fixed value when a current lower than a bias current is provided to a load.