US10490698B2ActiveUtilityA1

Optoelectronic semiconductor chip and method of producing the same

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Assignee: OSRAM OPTO SEMICONDUCTORS GMBHPriority: Sep 30, 2014Filed: Sep 22, 2015Granted: Nov 26, 2019
Est. expirySep 30, 2034(~8.2 yrs left)· nominal 20-yr term from priority
Inventors:Christoph Klemp
H01L 33/46H01L 33/20H01L 33/14H01L 33/0079H10H 20/841H10H 20/835H10H 20/816H10H 20/018H10H 20/819
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PatentIndex Score
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Cited by
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References
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Claims

Abstract

An optoelectronic semiconductor chip includes a semiconductor layer sequence and a carrier substrate, wherein the semiconductor layer sequence includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type and an active layer arranged between the first semiconductor region and the second semiconductor region, wherein the first semiconductor region faces the carrier substrate, the semiconductor layer sequence includes first recesses formed in the first semiconductor region and that do not separate the active layer, the semiconductor layer sequence includes second recesses that at least partially separate the first semiconductor region and the active layer, and the second recesses adjoin a first recess or are arranged between two first recesses.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
       1. An optoelectronic semiconductor chip comprising a semiconductor layer sequence and a carrier substrate, wherein
 the semiconductor layer sequence comprises a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type and an active layer arranged between the first semiconductor region and the second semiconductor region, wherein the first semiconductor region faces the carrier substrate, 
 the semiconductor layer sequence comprises first recesses formed in the first semiconductor region and that do not separate the active layer, 
 the semiconductor layer sequence comprises second recesses that at least partially separate the first semiconductor region and the active layer, 
 the second recesses adjoin a first recess or are arranged between two first recesses, and 
 the first recesses and the second recesses comprise oblique side surfaces that enclose an angle of 30° to 60° with the first main surface of the semiconductor layer sequence facing the carrier substrate. 
 
     
     
       2. The optoelectronic semiconductor chip according to  claim 1 , wherein regions of a first main surface of the semiconductor layer sequence arranged between a second recess and a neighboring first recess are not electrically contacted. 
     
     
       3. The optoelectronic semiconductor chip according to  claim 1 , wherein the first recesses and/or the second recesses have a depth of 0.1 μm to 10 μm. 
     
     
       4. The optoelectronic semiconductor chip according to  claim 1 , wherein the first recesses and/or the second recesses have a cross-sectional area that decreases from the carrier substrate. 
     
     
       5. The optoelectronic semiconductor chip according to  claim 1 , wherein the first recesses and/or the second recesses have a trapezoidal cross-sectional area. 
     
     
       6. The optoelectronic semiconductor chip according to  claim 1 , wherein the first recesses and/or the second recesses are prism-shaped. 
     
     
       7. The optoelectronic semiconductor chip according to  claim 1 , wherein the first recesses have a greater width than the second recesses, and the second recesses adjoin a first recess when viewed from the carrier substrate in each case in a vertical direction. 
     
     
       8. The optoelectronic semiconductor chip according to  claim 1 , wherein the first recesses have a width of 20 μm to 50 μm and the second recesses have a width of 2 μm to 20 μm. 
     
     
       9. The optoelectronic semiconductor chip according to  claim 1 , wherein the width of the first recesses is greater than a width of the second recesses by at least 10 μm. 
     
     
       10. The optoelectronic semiconductor chip according to  claim 1 , wherein the second recesses do not directly adjoin the first recesses and are each arranged between two of the first recesses. 
     
     
       11. The optoelectronic semiconductor chip according to  claim 10 , wherein the first recesses have a lateral distance of at least 20 μm and 50 μm at the most, and the second recesses have a width of 2 μm to 20 μm.

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