Method for manufacturing array substrate and array substrate

Abstract

A method for manufacturing an array substrate and an array substrate are disclosed. The method comprises the steps of forming a plurality of control electrodes on a baseplate, and forming a color-resist region between two adjacent control electrodes, wherein the color-resist region is a first color-resist region, a second color-resist region, a third color-resist region, and a fourth color-resist region in sequence; forming a first color-resist in the first color-resist region, forming a second color-resist in the second color-resist region, and forming a third color-resist in the third color-resist region; and coating the baseplate on which the control electrodes, the first color-resist, the second color-resist, and the third color-resist are formed and the fourth color-resist region with a transparent photoresist so as to form a flat layer. In the method according to the present disclosure, the production efficiency of the array substrate can be improved.

The invention claimed is: 
     
       1. A method for manufacturing an array substrate, comprising the following steps:
 forming a plurality of control electrodes on a baseplate, and forming a color-resist region between two adjacent control electrodes, wherein the color-resist region is a first color-resist region, a second color-resist region, a third color-resist region, and a fourth color-resist region in sequence; 
 forming a first color-resist in the first color-resist region, forming a second color-resist in the second color-resist region, and forming a third color-resist in the third color-resist region; and 
 forming a fourth color-resist by coating the baseplate on which the control electrodes, the first color-resist, the second color-resist, and the third color-resist are formed and the fourth color-resist region with a transparent photoresist so as to form a flat layer such that the transparent photoresist forms a flat top surface across the first color-resist, the second color-resist, the third color-resist, and the fourth color-resist, 
 wherein an entirety of the flat layer is made by coating a single material in one step. 
 
     
     
       2. The method according to  claim 1 , wherein a color-resist in the fourth color-resist region is formed by the flat layer directly. 
     
     
       3. The method according to  claim 1 , wherein the first color-resist, the second color-resist, and the third color-resist are red color-resist, green color-resist, and blue color-resist respectively. 
     
     
       4. The method according to  claim 2 , wherein the first color-resist, the second color-resist, and the third color-resist are red color-resist, green color-resist, and blue color-resist respectively. 
     
     
       5. The method according to  claim 1 , wherein the flat layer is made of a transparent resin material. 
     
     
       6. The method according to  claim 2 , wherein the flat layer is made of a transparent resin material. 
     
     
       7. The method according to  claim 1 , wherein a thickness of the flat layer ranges from 1.5 μm to 5.5 μm. 
     
     
       8. The method according to  claim 2 , wherein a thickness of the flat layer ranges from 1.5 μm to 5.5 μm. 
     
     
       9. The method according to  claim 1 , further comprising the following steps after the flat layer is formed:
 forming a via hole in the flat layer; and 
 forming a common electrode and a pixel electrode on the flat layer in sequence, wherein the pixel electrode is connected with the control electrode through the via hole. 
 
     
     
       10. The method according to  claim 2 , further comprising the following steps after the flat layer is formed:
 forming a via hole in the flat layer; and 
 forming a common electrode and a pixel electrode on the flat layer in sequence, wherein the pixel electrode is connected with the control electrode through the via hole. 
 
     
     
       11. The method according to  claim 9 , wherein a method for forming the control electrode comprises forming a gate, a source, and a drain in sequence, and the drain is connected with the pixel electrode. 
     
     
       12. The method according to  claim 10 , wherein a method for forming the control electrode comprises forming a gate, a source, and a drain in sequence, and the drain is connected with the pixel electrode. 
     
     
       13. An array substrate, comprising:
 a baseplate; 
 a plurality of control electrodes that are arranged on the baseplate spaced from one another; 
 a first color-resist region, a second color-resist region, a third color-resist region, and a fourth color-resist region each arranged between two adjacent control electrodes, wherein the first color-resist region, the second color-resist region, and the third color-resist region are provided with a first color-resist, a second color-resist, and a third color-resist respectively; and 
 a flat layer which completely covers the first color-resist, the second color-resist, the third color-resist, and the fourth color-resist region, 
 wherein an entirety of the flat layer is made of a single material of transparent resin coated in one step. 
 
     
     
       14. The array substrate according to  claim 13 , wherein the first color-resist, the second color-resist, and the third color-resist are red color-resist, green color-resist, and blue color-resist respectively. 
     
     
       15. The array substrate according to  claim 13 , wherein a color-resist in the fourth color-resist region is formed by the flat layer directly. 
     
     
       16. The array substrate according to  claim 14 , wherein a color-resist in the fourth color-resist region is formed by the flat layer directly.