System and method of writing to nonvolatile memory using write buffers

Abstract

According to one embodiment, a memory system receives from a host a first write request including a first block identifier designating a first write destination block to which first write data is to be written. The memory system acquires the first write data from a write buffer temporarily holding write data corresponding to each of the write requests, and writes the first write data to a write destination page in the first write destination block. The memory system releases a region in the write buffer, storing data which is made readable from the first write destination block by writing the first write data to the write destination page. The data made readable is a data of a page in the first write destination block preceding the write destination page.

What is claimed is: 
     
       1. A memory system connectable to a host, comprising:
 a nonvolatile memory including plural blocks; and 
 a controller electrically connected to the nonvolatile memory and configured to manage a plurality of write destination blocks allocated from the plurality of blocks, and write data in an order from a leading page to a last page for each of the write destination blocks, 
 data written to one page of one of the write destination blocks becoming readable after data is written to one or more subsequent pages of the write destination block, 
 each of write requests received from the host including a block identifier designating a write destination block to which write data is to be written, wherein 
 the controller is configured to: 
 receive from the host a first write request including a first block identifier designating a first write destination block to which first write data is to be written; 
 acquire the first write data from a write buffer temporarily holding write data corresponding to each of the write requests; 
 write the first write data to a write destination page in the first write destination block; 
 notify the host of a page address of the write destination page to which the first write data has been written; 
 increase a page address in the first write destination block to which data is to be next written, by one page; 
 release a region in the write buffer, the region storing data which is made readable from the first write destination block by writing the first write data to the write destination page, the data made readable being data of a page in the first write destination block preceding the write destination page; and 
 when the write buffer includes no unused regions:
 write dummy data to one or more pages of one of the plural write destination blocks; 
 increase a page address in the write destination block to which data is to be next written, by the number of one or more pages to which the dummy data has been written; and 
 release one or more regions in the write buffer, the one or more regions storing data which is made readable from the write destination block by writing the dummy data to the pages of the write destination block, the data made readable being data of one or more pages of the write destination block preceding the pages to which the dummy data has been written. 
 
 
     
     
       2. The memory system of  claim 1 , wherein
 writing of data to each of the pages in each of the write destination blocks is executed by a plural-step program operation including a first-step program operation and a second-step program operation, and 
 data written to one page of one of the write destination blocks by the first-step program operation is made readable by the second-step program operation on the page, the second-step program operation on the page being made executable by executing the first-step program operation on one or more pages subsequent to the page of the write destination block. 
 
     
     
       3. The memory system of  claim 1 , wherein
 when detecting that writing data of predetermined number of pages to any one of the write destination blocks is not executed per predetermined period, the controller writes dummy data to one or more pages of the any one of the write destination blocks, increases a page address in the any one of the write destination blocks to which data is to be next written, by the number of one or more pages to which the dummy data has been written, and releases one or more regions in the write buffer, the one or more regions storing data which is made readable from the any one of the write destination blocks by writing the dummy data to the pages of the any one of the write destination blocks, the data made readable being data of one or more pages in the any one of the write destination blocks preceding the pages to which the dummy data has been written. 
 
     
     
       4. The memory system of  claim 3 , wherein
 when writing the dummy data to one or more pages of any one of the write destination blocks, the controller 
 sets one or more written flags corresponding to the pages to which the dummy data are written, to a value indicating that the data has been written. 
 
     
     
       5. The memory system of  claim 3 , wherein
 when all the data in the any one of the write destination blocks are made readable except the dummy data, the controller stops writing of the dummy data to the any one of the write destination blocks. 
 
     
     
       6. The memory system of  claim 1 , wherein
 the controller is configured to: 
 manage plural write order management tables corresponding to the plural write destination blocks, each of the write order management tables holding plural written flags corresponding to plural pages in the corresponding write destination block; and 
 when writing the dummy data to one or more pages in the write destination block, set one or more written flags corresponding to the pages to which the dummy data are written, to a value indicating that the data has been written. 
 
     
     
       7. The memory system of  claim 1 , wherein
 when all the data in the write destination block are made readable except the dummy data, the controller stops writing of the dummy data to the write destination block. 
 
     
     
       8. The memory system of  claim 1 , wherein
 in a case where the write buffer is present on a memory in the host, the controller releases the region in the write buffer by transmitting to the host a request to release the region in the write buffer. 
 
     
     
       9. A method of managing a plurality of write destination blocks allocated from a plurality of blocks included in a nonvolatile memory, and writing data in an order from a leading page to a last page for each of the write destination blocks,
 data written to one page of one of the write destination blocks becoming readable after data is written to one or more subsequent pages of the write destination block, 
 each of write requests received from a host including a block identifier designating a write destination block to which write data is to be written, 
 the method comprising: 
 receiving from the host a first write request including a first block identifier designating a first write destination block to which first write data is to be written; 
 acquiring the first write data from a write buffer temporarily holding write data corresponding to each of the write requests; 
 writing the first write data to a write destination page in the first write destination block; 
 notifying the host of a page address of the write destination page to which the first write data has been written; 
 increasing a page address in the first write destination block to which data is to be next written, by one page; 
 releasing a region in the write buffer, the region storing data which is made readable from the first write destination block by writing the first write data to the write destination page, the data made readable being data of a page in the first write destination block preceding the write destination page; and 
 when the write buffer includes no unused regions:
 writing dummy data to one or more pages of one of the plural write destination blocks; 
 increasing a page address in the write destination block to which data is to be next written, by the number of one or more pages to which the dummy data has been written; and 
 releasing one or more regions in the write buffer, the one or more regions storing data which is made readable from the write destination block by writing the dummy data to the pages of the write destination block, the data made readable being data of one or more pages of the write destination block preceding the pages to which the dummy data has been written. 
 
 
     
     
       10. The method of  claim 9 , wherein
 writing the data to each of the pages in each of the write destination blocks is executed by a plural-step program operation including a first-step program operation and a second-step program operation, and 
 data written to one page of one of the write destination blocks by the first-step program operation is made readable by the second-step program operation on the page, the second-step program operation on the page being made executable by executing the first-step program operation on one or more pages subsequent to the page of the write destination block. 
 
     
     
       11. The method of  claim 9 , further comprising:
 when detecting that writing data of predetermined number of pages to any one of the write destination blocks is not executed per predetermined period:
 writing dummy data to one or more pages of the any one of the write destination blocks; 
 increasing a page address in the any one of the write destination blocks to which data is to be next written, by the number of one or more pages to which the dummy data has been written; and 
 releasing one or more regions in the write buffer, the one or more regions storing data which is made readable from the any one of the write destination blocks by writing the dummy data to the pages of the any one of the write destination blocks, the data made readable being data of one or more pages in the any one of the write destination blocks preceding the pages to which the dummy data has been written. 
 
 
     
     
       12. A memory system connectable to a host, comprising:
 a nonvolatile memory including a plurality of blocks; and 
 a controller electrically connected to the nonvolatile memory and configured to manage a plurality of write destination blocks allocated from the plurality of blocks, and write data in an order from a leading page to a last page for each of the write destination blocks, 
 writing of data to each of the pages of each of the write destination blocks being executed by a plural-step program operation including a first-step program operation and a second-step program operation, 
 data written to one page of one of the write destination blocks by the first-step program operation being made readable by the second-step program operation on the page, the second-step program operation on the page being made executable by executing the first-step program operation on one or more pages subsequent to the page of the write destination block, 
 each of write requests received from the host including a block identifier designating a write destination block to which write data is to be written, wherein 
 the controller is configured to: 
 receive from the host a first write request including a first block identifier designating a first write destination block to which first write data is to be written; 
 acquire the first write data from a write buffer temporarily holding write data corresponding to each of the write requests; 
 write the first write data to a write destination page in the first write destination block by the first-step program operation; 
 notify the host of a page address of the write destination page to which the first write data has been written; 
 increase a page address in the first write destination block to which data is to be next written, by one page; 
 release a region in the write buffer, the region storing data which is made readable from the first write destination block by executing the second-step program operation, the second-step program operation being made executable by the first-step program operation on the write destination page, the data made readable being data of a page in the first write destination block preceding the write destination page; and 
 when detecting that writing data of predetermined number of pages to any one of the write destination blocks is not executed per predetermined period:
 write dummy data to one or more pages of the any one of the write destination blocks by the first-step program operation; 
 increase a page address in the any one of the write destination blocks to which data is to be next written, by the number of one or more pages to which the dummy data has been written; and 
 release one or more regions in the write buffer, the one or more regions storing data which is made readable from the any one of the write destination blocks by executing the second-step program operation made executable by the first-step program operation of the dummy data, the data made readable being data of one or more pages in the any one of the write destination blocks preceding the pages to which the dummy data has been written. 
 
 
     
     
       13. The memory system of  claim 12 , wherein
 when the write buffer includes no unused regions, the controller writes dummy data to one or more pages of one of the plural write destination blocks by the first-step program operation, increases a page address in the write destination block to which data is to be next written, by the number of one or more pages to which the dummy data has been written, and releases one or more regions in the write buffer, the one or more regions storing data which is made readable by executing the second-step program operation made executable by the first-step program operation of the dummy data, the data made readable being data of one or more pages in the write destination block preceding the pages to which the dummy data has been written. 
 
     
     
       14. A memory system, comprising:
 a nonvolatile memory including a plurality of blocks; and 
 a controller electrically connected to the nonvolatile memory and configured to: 
 acquire first write data from a write buffer; 
 write the first write data to a first memory cell connected to a first word line in a first block; 
 acquire second write data from the write buffer; 
 write the second write data to a second memory cell connected to a second word line in the first block, the second word line being different from the first word line; 
 keep the first write data in a region of the write buffer, without releasing the region, after the first write data is written to the first memory cell until the second write data is written to the second memory cell; and 
 upon the second write data being written to the second memory cell, release the region of the write buffer, wherein 
 the first write data is made readable from the first block by writing the second write data to the second memory cell. 
 
     
     
       15. The memory system of  claim 14 , wherein
 writing of data to a memory cell connected to a word line in a block is executed by a plural-step program operation including a first-step program operation and a second-step program operation, and 
 the second-step program operation to the first memory cell connected to the first word line is made executable by executing the first-step program operation to the second memory cell connected to the second word line.