Semiconductor device and method for manufacturing the same

Abstract

A buried n-type region is provided in a surface layer portion of an n-type body layer of a Pch MOSFET. This makes it possible to lower the threshold voltage Vt. In a portion of the n-type body layer other than the buried n-type region, since an n-type impurity concentration can be kept relatively high, the threshold voltage Vt can be lowered while securing an on-breakdown voltage. Furthermore, since an accumulation region is configured by an n-type active layer, a partial high concentration portion is not formed in a p-type drift layer. Therefore, as in the case where the partial high concentration portion is generated in the p-type drift layer, a reduction in a breakdown voltage caused by an electric field concentration can be restricted from occurring with a distribution in which equipotential lines are concentrated.

The invention claimed is: 
     
       1. A semiconductor device comprising:
 an LDMOS of a second conductivity type channel including: 
 a semiconductor substrate that includes a semiconductor layer of a first conductivity type; 
 a body layer of the first conductivity type which is disposed in the semiconductor layer and has an impurity concentration higher than that of the semiconductor layer; 
 a source region of a second conductivity type which is terminated in the body layer and disposed in a surface layer portion of the body layer; 
 a drift layer of the second conductivity type which is disposed away from the body layer in the semiconductor layer; 
 a drain region of the second conductivity type which is disposed in the drift layer and has an impurity concentration higher than that of the drift layer; 
 a gate insulating film that is disposed between the source region and the drain region; 
 a gate electrode that is disposed on a portion of the gate insulating film, the portion corresponding to a portion of the gate insulating film which is in contact with the body layer; 
 a source electrode that is connected to the source region; and 
 a drain electrode that is connected to the drain region, wherein 
 the body layer has a portion configuring a channel region at a position in contact with the gate insulating film, and the portion configuring the channel region is a buried region that contains impurities of the second conductivity type and has a lower carrier concentration than that of a remaining portion of the body layer. 
 
     
     
       2. The semiconductor device according to  claim 1 , wherein
 the drift layer has a second conductivity type impurity concentration that lowers toward the body layer. 
 
     
     
       3. The semiconductor device according to  claim 1 , further comprising:
 a buffer layer of the second conductivity type which is terminated in the drift layer and has an impurity concentration higher than that of the drift layer, wherein 
 the drain region is terminated in the buffer layer of the second conductivity type and has an impurity concentration higher than that of the buffer layer. 
 
     
     
       4. The semiconductor device according to  claim 1 , wherein
 in the LDMOS of the second conductivity type channel, the body layer is referred to as a first body layer, the source region is referred to as a first source region, the drift layer is referred to as a first drift layer, the drain region is referred to as a first drain region, the gate insulating film is referred to as a first gate insulating film, the source electrode is referred to as a first source electrode, and the drain electrode is referred to as a first drain electrode, 
 the semiconductor substrate is provided with an LDMOS of a first conductivity channel, the LDMOS of the first conductivity channel includes: 
 a second body layer of the second conductivity type which is disposed in the semiconductor layer; 
 a second source region of the first conductivity type which is terminated in the second body layer and disposed in a surface layer portion of the second body layer; 
 a second drain region of the first conductivity type which is disposed in the semiconductor layer and has an impurity concentration higher than that of the semiconductor layer; 
 a second gate insulating film which is disposed between the second source region and the second drain region; 
 a second gate electrode that is disposed on a portion of the second gate insulating film, the portion corresponding to a portion of the second gate insulating film which is in contact with the second body layer; 
 a second source electrode that is connected to the second source region; and 
 a second drain electrode that is connected to the second drain region. 
 
     
     
       5. The semiconductor device according to  claim 4 , wherein
 the LDMOS of the first conductivity type channel includes a buffer layer of the first conductivity type which is disposed away from second body layer in the semiconductor layer, and 
 the second drain region is terminated in the buffer layer of the first conductivity type and has an impurity concentration higher than that of the buffer layer. 
 
     
     
       6. A method for manufacturing a semiconductor device having an LDMOS of a second conductivity type channel relative to a semiconductor substrate having a semiconductor layer of a first conductivity type, the method comprising:
 preparing the semiconductor substrate; 
 forming a gate insulating film at a predetermined position of the semiconductor layer; 
 forming a drift layer of a second conductivity type in the semiconductor layer; 
 forming a body layer of the first conductivity type having an impurity concentration higher than that of the semiconductor layer at a position distant from the drift layer in the semiconductor layer; 
 forming a source region of the second conductivity type which is terminated in the body layer in a surface layer portion of the body layer located at one end of the gate insulating film; 
 forming a drain region of the second conductivity type in a surface layer portion of the drift layer and at another end of the gate insulating film, the drain region having an impurity concentration higher than that of the drift layer; 
 forming a gate electrode on a portion of the gate insulating film, the portion corresponding to a portion of the gate insulating film which is in contact with the body layer; 
 forming a source electrode that is connected to the source region; and 
 forming a drain electrode that is connected to the drain region, wherein 
 the forming the body layer includes forming a buried region having a carrier concentration lower than that of a remaining portion of the body layer by ion implanting a second conductivity type impurity into a portion of the body layer which configures a channel region in contact with the gate insulating film. 
 
     
     
       7. The method for manufacturing the semiconductor device according to  claim 6 , further comprising
 forming a buffer layer of the second conductivity type which is terminated in the drift layer and has an impurity concentration higher than that of the drift layer, wherein 
 the forming the drain region includes forming of the drain region so that the drain region is terminated in the buffer layer and has an impurity concentration higher than that of the buffer layer. 
 
     
     
       8. The method for manufacturing the semiconductor device according to  claim 6 , wherein
 the forming the body layer includes forming the body layer by ion implanting the first conductivity type impurity into the semiconductor layer, and 
 the ion implantation of the first conductivity type impurity and the ion implantation of the second conductivity type impurity to form the buried region are performed using a same mask.