US10707338B2ActiveUtilityA1

Semiconductor device and method of manufacturing the same

55
Assignee: FUJITSU LTDPriority: Mar 20, 2018Filed: Feb 25, 2019Granted: Jul 7, 2020
Est. expiryMar 20, 2038(~11.7 yrs left)· nominal 20-yr term from priority
H10D 64/256H10D 62/405H10D 30/015H10D 62/852H10D 62/149H10D 30/4732H01L 29/7783H01L 29/045H01L 29/66462
55
PatentIndex Score
0
Cited by
8
References
18
Claims

Abstract

A semiconductor device includes a substrate; a first barrier layer containing AlN, over the substrate; a channel layer containing BGaN, over the first barrier layer; and a second barrier layer containing AlN, over the channel layer. A difference between a first lattice constant of the channel layer and a second lattice constant of the first barrier layer is less than or equal to 1.55% of the second lattice constant.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor device comprising:
 a substrate; 
 a first barrier layer containing AlN, over the substrate; 
 a channel layer containing BGaN, over the first barrier layer; and 
 a second barrier layer containing AlN, over the channel layer, 
 wherein a difference between a first lattice constant of the channel layer and a second lattice constant of the first barrier layer is less than or equal to 1.55% of the second lattice constant. 
 
     
     
       2. The semiconductor device as claimed in  claim 1 , wherein the first barrier layer is an AlN layer, and
 wherein the channel layer is a BGaN layer whose B composition is greater than or equal to 0.05 and less than or equal to 0.20. 
 
     
     
       3. The semiconductor device as claimed in  claim 1 , wherein the substrate is an AlN substrate. 
     
     
       4. The semiconductor device as claimed in  claim 1 , further comprising:
 a source electrode, a drain electrode, and a gate electrode, over the channel layer. 
 
     
     
       5. The semiconductor device as claimed in  claim 4 , further comprising:
 a first contact layer contacting the channel layer and the source electrode; and 
 a second contact layer contacting the channel layer and the drain electrode. 
 
     
     
       6. The semiconductor device as claimed in  claim 1 , wherein a thickness of the channel layer is less than or equal to 20 nm. 
     
     
       7. The semiconductor device as claimed in  claim 1 , wherein a surface of the first barrier layer is a (0001) surface. 
     
     
       8. The semiconductor device as claimed in  claim 1 , wherein a surface of the first barrier layer is a (000-1) surface. 
     
     
       9. An amplifier comprising:
 the semiconductor device as claimed in  claim 1 . 
 
     
     
       10. An electric power supply device comprising:
 the semiconductor device as claimed in  claim 1 . 
 
     
     
       11. A method of manufacturing a semiconductor device, the method comprising:
 forming a first barrier layer containing AlN, over a substrate; 
 forming a channel layer containing BGaN, over the first barrier layer; and 
 forming a second barrier layer containing AlN, over the channel layer, 
 wherein a difference between a first lattice constant of the channel layer and a second lattice constant of the first barrier layer is less than or equal to 1.55% of the second lattice constant. 
 
     
     
       12. The method of manufacturing the semiconductor device as claimed in  claim 11 , wherein the first barrier layer is an AlN layer, and
 wherein the channel layer is a BGaN layer whose B composition is greater than or equal to 0.05 and less than or equal to 0.20. 
 
     
     
       13. The method of manufacturing the semiconductor device as claimed in  claim 11 , wherein the substrate is an AlN substrate. 
     
     
       14. The method of manufacturing the semiconductor device as claimed in  claim 11 , the method further comprising:
 forming a source electrode, a drain electrode, and a gate electrode over the channel layer. 
 
     
     
       15. The method of manufacturing the semiconductor device as claimed in  claim 14 , the method further comprising:
 forming a first contact layer contacting the channel layer and the source electrode, and a second contact layer contacting the channel layer and the drain electrode. 
 
     
     
       16. The method of manufacturing the semiconductor device as claimed in  claim 11 , wherein a thickness of the channel layer is less than or equal to 20 nm. 
     
     
       17. The method of manufacturing the semiconductor device as claimed in  claim 11 , wherein a surface of the first barrier layer is a (0001) surface. 
     
     
       18. The method of manufacturing the semiconductor device as claimed in  claim 11 , wherein a surface of the first barrier layer is a (000-1) surface.

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