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US10778157B2ActiveUtilityPatentIndex 39

RF power amplifier circuits for constant radiated power and enhanced antenna mismatch sensitivity

Assignee: BEREX INCPriority: Dec 12, 2018Filed: Dec 12, 2019Granted: Sep 15, 2020
Est. expiryDec 12, 2038(~12.4 yrs left)· nominal 20-yr term from priority
Inventors:GORBACHOV OLEKSANDRZHANG LISETTE L
H03G 3/3042H03F 2200/207H03G 1/0029H03F 2200/451H03F 3/193H03F 3/245H03F 2200/204H03F 3/195
39
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References
14
Claims

Abstract

An RF receiver circuit configuration and design limited by conditions and frequencies to simultaneously provide steady state low-noise signal amplification, frequency down-conversion and image signal rejection. The invention provides combined circuits of an RF transceiver architecture that measure antenna reflected power relative to forward power using the error amplifier signal to adjust the gain of the variable gain amplifier in order to compensate for the mismatch between forward reflected power and forward power at the antenna in order to achieve constant radiated power. The RF receiver circuit may be implemented as one of a CMOS single chip device or as part of an integrated system of CMOS components.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A radio frequency (RF) power amplifier architecture and circuits for adjusting output power to achieve constant radiated power delivered to an antenna, comprising:
 a first amplifier with constant gain G 1  providing forward power Pf through an output terminal connected to an input port of a four port first directional coupler with coupling coefficients K 1  and K 2  and with an input terminal of the first amplifier connected to the output terminal of a variable gain driver amplifier with gain G 2 ; 
 a second directional coupler with coupling coefficient K 3  with an output port connected to the input terminal of the variable gain driver amplifier and an input port of the second directional coupler receiving a RF input signal Pin; 
 an antenna connected to and receiving forward power Pf from the output port of the first directional coupler and sending reflecting power Pr into the output port of the first directional coupler; 
 a first divider circuit with its first port connected to and receiving power X 1 =K 1 ×Pf from the coupled port of the first directional coupler and its second port connected to and receiving power X 2 =K 2 ×Pr from the isolation port of the first directional coupler, wherein the first divider outputs a value X 2 /X 1  from an output terminal to an adder circuit input terminal, wherein the adder circuit outputs the addition 1−X 2 /X 1  to an output terminal; 
 a second amplifier with constant gain G 3  and with its input terminal connected to and receiving power X 3 =K 3 ×Pin from a coupled port of the second directional coupler and with its output terminal delivering power X 4 =G 3 ×X 3  to a first port of a second divider circuit, wherein a second port of the second divider circuit is connected to the first port of the first divider circuit and wherein the second divider circuit outputs a value X 4 /X 1  from an output terminal; 
 an error amplifier with a first input connected to and receiving a power value X 4 /X 1  from the output terminal of the second divider circuit and with a second input connected to and receiving a power value 1−X 2 /X 1  from the output terminal of the adder circuit wherein an output of the error amplifier is connected to and adjusts the gain of the variable gain driver amplifier; and 
 wherein the combined circuits measure antenna reflected power relative to forward power using the error amplifier signal to adjust the gain of the variable gain amplifier in order to compensate for the mismatch between forward reflected power and forward power at the antenna. 
 
     
     
       2. The RF power amplifier circuit of  claim 1 , wherein the antenna impedance and impedance of the power transfer lines are 50 Ohm. 
     
     
       3. The RF power amplifier circuit of  claim 1 , wherein the variable gain amplifier is replaced with a variable attenuator circuit. 
     
     
       4. A radio frequency (RF) power amplifier architecture and circuits for adjusting output power to achieve constant radiated power delivered to multiple antennas, comprising:
 a first amplifier with constant gain G 1  providing forward power Pf through an output terminal connected to an input port of a four port first directional coupler with coupling coefficients K 1  and K 2  and with an input terminal of the first amplifier connected to the output terminal of a variable gain driver amplifier with gain G 2 ; 
 a second directional coupler with coupling coefficient K 3  with an output port connected to the input terminal of the variable gain driver amplifier and an input port of the second directional coupler receiving a RF input signal Pin; 
 one or more antennas each separately connectable through a switch and, when connected, receiving forward power Pf from the output port of the first directional coupler and sending reflecting power Pr into the output port of the first directional coupler; 
 a first divider circuit with its first port connected to and receiving power X 1 =K 1 ×Pf from the coupled port of the first directional coupler and its second port connected to and receiving power X 2 =K 2 ×Pr from the isolation port of the first directional coupler, wherein the first divider outputs a value X 2 /X 1  from an output terminal to an adder circuit input terminal, wherein the adder circuit outputs the addition 1−X 2 /X 1  to an output terminal; 
 a second amplifier with constant gain G 3  and with its input terminal connected to and receiving power X 3 =K 3 ×Pin from a coupled port of the second directional coupler and with its output terminal delivering power X 4 =G 3 ×X 3  to a first port of a second divider circuit, wherein a second port of the second divider circuit is connected to the first port of the first divider circuit and wherein the second divider circuit outputs a value X 4 /X 1  from an output terminal; 
 an first error amplifier with a first input connected to and receiving a power value X 4 /X 1  from the output terminal of the second divider circuit and with a second input connected to and receiving a power value 1−X 2 /X 1  from the output terminal of the adder circuit wherein an output of the first error amplifier is connected to and adjusts the gain of the variable gain driver amplifier; 
 a second error amplifier with a first input connected to the output terminal of the first divider circuit and with a second input connected to a reference signal with a level Br defining the level expected to represent a broken or disconnected antenna wherein an output of the second error amplifier is connected to and drives an alarm signal; and 
 wherein the combined circuits measure antenna reflected power relative to forward power using the error amplifier signal to adjust the gain of the variable gain amplifier in order to compensate for the mismatch between forward reflected power and forward power at the antenna, and wherein the second error amplifier drives the antenna alarm when the power mismatch exceeds a set level Br, for example when an antenna becomes broken or unconnected to the circuit. 
 
     
     
       5. The RF power amplifier circuit of  claim 4 , wherein the antenna impedance and impedance of the power transfer lines are 50 Ohm. 
     
     
       6. The RF power amplifier circuit of  claim 4 , wherein the variable gain amplifier is replaced with a variable attenuator circuit. 
     
     
       7. The RF power amplifier circuit of  claim 4  wherein the second error amplifier level L is less than a Voltage Standing Wave Ratio (VSWR) of 6:1, wherein Pr is one half of Pf. 
     
     
       8. A radio frequency (RF) power amplifier architecture and circuits for adjusting output power to achieve constant radiated power delivered to an antenna along with a low noise amplifier with enhanced signal receiving sensitivity comprising:
 a first amplifier with constant gain G 1  providing forward power Pf through an output terminal connected to an input port of a four port first directional coupler with coupling coefficients K 1  and K 2  and with an input terminal of the first amplifier connected to the output terminal of a variable gain driver amplifier with gain G 2 ; 
 a second directional coupler with coupling coefficient K 3  with an output port connected to the input terminal of the variable gain driver amplifier and an input port of the second directional coupler receiving a RF input signal Pin; 
 an antenna connected to the single pole of a SPDT antenna mode switch ASW and when switched in a transmit mode to a first of the double poles of switch ASW receives forward power Pf from the output port of the first directional coupler and sends reflecting power Pr into the output port of the first directional coupler; 
 a first divider circuit with its first port connected to and receiving power X 1 =K 1 ×Pf from the coupled port of the first directional coupler and its second port connected to and receiving power X 2 =K 2 ×Pr from the isolation port of the first directional coupler, wherein the first divider outputs a value X 2 /X 1  from an output terminal to an adder circuit input terminal, wherein the adder circuit outputs the addition 1−X 2 /X 1  to an output terminal; 
 a second amplifier with constant gain G 3  and with its input terminal connected to and receiving power X 3 =K 3 ×Pin from a coupled port of the second directional coupler and with its output terminal delivering power X 4 =G 3 ×X 3  to a first port of a second divider circuit, wherein a second port of the second divider circuit is connected to the first port of the first divider circuit and wherein the second divider circuit outputs a value X 4 /X 1  from an output terminal; 
 an error amplifier with a first input connected to and receiving a power value X 4 /X 1  from the output terminal of the second divider circuit and with a second input connected to and receiving a power value 1−X 2 /X 1  from the output terminal of the adder circuit wherein an output of the error amplifier with value X 5  is connected to and adjusts the gain of the variable gain driver amplifier; 
 a receiver low noise amplifier LNA with variable gain with an input connected to the antenna through a second of the dual poles of switch ASW when ASW is switched into a receive mode rather than into the transmit mode; 
 a hold circuit for holding signal value X 5  with a first input connected to the output terminal of the error amplifier and an output connected to the low noise amplifier and adjusts the gain of the low noise amplifier during the receive mode of switch ASW; 
 an LNA enable signal line connected to a second input of the hold circuit and to the low noise amplifier and to the antenna switch wherein when switch ASW is switched into receive mode the gain of the LNA is set to the same value as the variable gain driver amplifier had during the transmit mode; and 
 wherein the combined circuits measure antenna reflected power relative to forward power using the error amplifier signal to adjust the gain of the variable gain amplifier in order to compensate for the mismatch between forward reflected power and forward power at the antenna in a transmit mode and then apply the same gain to a variable gain low noise amplifier in a receive mode. 
 
     
     
       9. The RF power amplifier circuit of  claim 8 , wherein the antenna impedance and impedance of the power transfer lines are 50 Ohm. 
     
     
       10. The RF power amplifier circuit of  claim 8 , wherein the variable gain amplifier is replaced with a variable attenuator circuit. 
     
     
       11. A radio frequency (RF) power amplifier architecture and circuits for adjusting output power to achieve constant radiated power delivered to an antenna along with a low noise amplifier with a guard against large antenna signals, comprising:
 a first amplifier with constant gain G 1  providing forward power Pf through an output terminal connected to an input port of a four port first directional coupler with coupling coefficients K 1  and K 2  and with an input terminal of the first amplifier connected to the output terminal of a variable gain driver amplifier with gain G 2 ; 
 a second directional coupler with coupling coefficient K 3  with an output port connected to the input terminal of the variable gain driver amplifier and an input port of the second directional coupler receiving a RF input signal Pin; 
 an antenna connected to the single pole of a SPDT antenna mode switch ASW and when switched in a transmit mode to a first of the double poles of switch ASW receives forward power Pf from the output port of the first directional coupler and sends reflecting power Pr into the output port of the first directional coupler; 
 a first divider circuit with its first port connected to and receiving power X 1 =K 1 ×Pf from the coupled port of the first directional coupler and its second port connected to and receiving power X 2 =K 2 ×Pr from the isolation port of the first directional coupler, wherein the first divider outputs a value X 2 /X 1  from an output terminal to an adder circuit input terminal, wherein the adder circuit outputs the addition 1−X 2 /X 1  to an output terminal; 
 a second amplifier with constant gain G 3  and with its input terminal connected to and receiving power X 3 =K 3 ×Pin from a coupled port of the second directional coupler and with its output terminal delivering power X 4 =G 3 ×X 3  to a first port of a second divider circuit, wherein a second port of the second divider circuit is connected to the first port of the first divider circuit and wherein the second divider circuit outputs a value X 4 /X 1  from an output terminal; 
 an error amplifier with a first input connected to and receiving a power value X 4 /X 1  from the output terminal of the second divider circuit and with a second input connected to and receiving a power value 1−X 2 /X 1  from the output terminal of the adder circuit wherein an output of the error amplifier with value X 5  is connected to and adjusts the gain of the variable gain driver amplifier; 
 a receiver low noise amplifier LNA with variable gain with an input connected to the antenna through a second of the dual poles of switch ASW when ASW is switched into a receive mode rather than into the transmit mode; 
 an adjust circuit with a first input connected to the output terminal of the first divider circuit and an output connected to the low noise amplifier and adjusts the gain of the low noise amplifier during the receive mode of switch ASW; 
 an LNA enable signal line connected to the low noise amplifier and to the antenna switch wherein when switch ASW is switched into receive mode the gain of the LNA is set to the same value as the output of the first divider circuit; and 
 wherein the combined circuits measure antenna reflected power relative to forward power using the error amplifier signal to adjust the gain of the variable gain amplifier in order to compensate for the mismatch between forward reflected power and forward power at the antenna in a transmit mode and then apply a lower gain to a variable gain low noise amplifier in a receive mode in order to avoid saturating subsequent input stages if the antenna signal is excessive. 
 
     
     
       12. The RF power amplifier circuit of  claim 11 , wherein the antenna impedance and impedance of the power transfer lines are 50 Ohm. 
     
     
       13. The RF power amplifier circuit of  claim 11 , wherein the variable gain amplifier is replaced with a variable attenuator circuit. 
     
     
       14. The RF power amplifier circuit of  claim 11 , wherein the circuits less the antenna are implemented in a CMOS single chip integrated circuit.

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