Method for controlling power supply voltage in semiconductor integrated circuit

Abstract

A semiconductor integrated circuit operates with a voltage supplied from a first power supply IC to transmit and receive data to and from an external memory. The semiconductor integrated circuit includes: an interface circuit operating with a voltage supplied from a second power supply IC and accessing the external memory to transmit and receive data to and from the external memory; a determination circuit which determines, based on a result of the access by the interface circuit, an AC timing specification between the external memory and the interface circuit to generate control information for controlling an output voltage of the second power supply IC in accordance with the AC timing specification; and a voltage control circuit which controls the output voltage of the second power supply IC in accordance with the control information.

What is claimed is: 
     
       1. A method in a semiconductor integrated circuit including an interface circuit, a part of the semiconductor integrated circuit other than the interface circuit being supplied a voltage from a first power supply integrated circuit (IC) dynamically changing an output voltage of the first power supply IC, for controlling a voltage supplied from a second power supply IC different from the first power supply IC to the interface circuit, the method comprising steps of:
 (a) accessing an external memory to transmit and receive data to and from the external memory, by the interface circuit; 
 (b) changing a control information for controlling an output voltage of the second power supply IC independently from the first power supply IC based on a result of the access done by the interface circuit; and 
 (c) transmitting or receiving data to or from the external memory by the interface circuit with the controlled output voltage of the second power supply IC. 
 
     
     
       2. The method of  claim 1 , wherein the step (b) includes determining an alternate current (AC) timing specification between the external memory and the interface circuit. 
     
     
       3. The method of  claim 2 , wherein the step (b) includes changing the control information to indicate the output voltage of the second power supply IC be lowered if the AC timing specification is larger than a predetermined value, and the output voltage of the second power supply IC be raised if the AC timing specification is smaller than the predetermined value. 
     
     
       4. The method of  claim 2 , the in the step (b), the control information is changed further based on a stored value of the voltage to be output by the second power supply IC, wherein the AC timing specification is associated with the value. 
     
     
       5. The method of  claim 1 , wherein the step (a) is done in a test mode and the step (c) is done in a normal mode. 
     
     
       6. The method of  claim 1 , wherein in the step (b), the control information is changed further based on temperature information from a temperature sensor within the semiconductor integrated circuit. 
     
     
       7. The method of  claim 1 , wherein in the step (b), the control information is changed further based on the interface circuit's own process induced variation from a process sensor within the semiconductor integrated circuit. 
     
     
       8. The method of  claim 1 , wherein in the step (b), the control information is changed further based on a voltage from a voltage monitor within the semiconductor integrated circuit.