US10811391B2ActiveUtilityA1

Semiconductor device and method for manufacturing semiconductor device

49
Assignee: TOSHIBA KKPriority: Mar 13, 2018Filed: Feb 11, 2019Granted: Oct 20, 2020
Est. expiryMar 13, 2038(~11.7 yrs left)· nominal 20-yr term from priority
H10W 90/754H10W 90/752H10W 90/24H10W 70/63H10W 90/231H10W 72/075H10W 72/0198H10W 72/884H10W 72/59H10W 72/073H10W 72/01304H10W 90/724H10W 90/734H10W 90/732H10W 90/00H10D 62/117H01L 2225/0651H01L 2225/06506H01L 25/50H01L 25/0657H01L 2225/06562
49
PatentIndex Score
0
Cited by
25
References
9
Claims

Abstract

A semiconductor device includes a base, a first semiconductor chip mounted on the base, and a second semiconductor chip provided above the first semiconductor chip. The second semiconductor chip includes a first portion, a second portion including a region directly above a center of the first semiconductor chip, and a third portion including part of a portion of the second semiconductor chip other than a region directly above the first semiconductor chip. The second portion is thicker than the first portion. The third portion is thicker than the second portion and is disposed at a position sandwiching the first semiconductor chip.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor device, comprising:
 a base; 
 a first semiconductor chip mounted on the base; and 
 a second semiconductor chip provided above the first semiconductor chip, 
 the second semiconductor chip including
 a first portion, 
 a second portion including a region directly above a center of the first semiconductor chip, the second portion being thicker than the first portion, notches being provided on a bottom surface of the second portion, and 
 a third portion including part of a portion of the second semiconductor chip other than a region directly above the first semiconductor chip, the third portion being thicker than the second portion and being disposed at a position sandwiching the first semiconductor chip. 
 
 
     
     
       2. The device according to  claim 1 , wherein a curvature radius of an upper end portion of a side surface of the third portion facing the second portion is larger than a curvature radius of a lower end portion of the side surface. 
     
     
       3. The device according to  claim 1 , further comprising:
 a first wire connecting the first semiconductor chip to the base; 
 a second wire electrically connecting the second semiconductor chip to the base; 
 a plurality of third semiconductor chips provided on the second semiconductor chip; and 
 a plurality of third wires electrically connecting the third semiconductor chip to the base, 
 the first portion being disposed in a region directly above the first wire, 
 the third semiconductor chips not being disposed in a region directly above a portion of the second semiconductor chip where the second wire is connected, 
 for one of the third semiconductor chips, other third semiconductor chips are not disposed in a region directly above a portion of the one of the third semiconductor chips where the third wire is connected. 
 
     
     
       4. The device according to  claim 1 , wherein a configuration of the first portion is two line configurations parallel to each other when viewed from above. 
     
     
       5. The device according to  claim 1 , wherein a configuration of the first portion is a lattice configuration when viewed from above. 
     
     
       6. A semiconductor device, comprising:
 a base; 
 a first semiconductor chip mounted on the base; and 
 a second semiconductor chip provided above the first semiconductor chip, 
 the second semiconductor chip including
 a first portion, 
 a second portion including a region directly above a center of the first semiconductor chip, the second portion being thicker than the first portion, notches being provided on a bottom surface of the second portion, and 
 a third portion including part of a portion of the second semiconductor chip other than a region directly above the first semiconductor chip, the third portion being thicker than the second portion and being disposed at a position sandwiching the first semiconductor chip, 
 
 wherein a curvature radius of an upper end portion of a side surface of the third portion facing the second portion is larger than a curvature radius of a lower end portion of the side surface, 
 wherein an R/D ratio is 0.4 or more, D being a difference between a thickness of the third portion and a thickness of the first portion, R being the curvature radius of the upper end portion of the side surface. 
 
     
     
       7. The device according to  claim 6 , wherein the R/D ratio is 0.8 or more. 
     
     
       8. A semiconductor device, comprising:
 a base; 
 a first semiconductor chip mounted on the base; and 
 a second semiconductor chip provided above the first semiconductor chip, 
 the second semiconductor chip including
 a first portion, 
 a second portion including a region directly above a center of the first semiconductor chip, the second portion being thicker than the first portion, notches being provided on a bottom surface of the second portion, and 
 a third portion including part of a portion of the second semiconductor chip other than a region directly above the first semiconductor chip, the third portion being thicker than the second portion and being disposed at a position sandwiching the first semiconductor chip, 
 
 wherein the second semiconductor chip further includes a fourth portion positioned at an end portion of the second semiconductor chip, the fourth portion being thicker than the first portion and thinner than the third portion. 
 
     
     
       9. A method for manufacturing a semiconductor device, comprising:
 mounting a first semiconductor chip on a base; 
 forming a plurality of first portions having line configurations by grinding a surface of a second semiconductor chip to a first depth; 
 forming a second portion having a line configuration by grinding the surface to a second depth shallower than the first depth, the forming the second portion including grinding the surface using a blade multiple times; and 
 mounting the second semiconductor chip at the base to cause the second portion to oppose a center of the first semiconductor chip.

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