Semiconductor devices including electrically conductive contacts and related systems and methods

Abstract

A semiconductor device comprises an array region, a dummy region, pillars of an electrically insulative material in the array region and the dummy region. The semiconductor device further comprises electrically conductive contacts between adjacent pillars of the electrically insulative material in the array region, another electrically insulative material between adjacent pillars of the electrically insulative material in the dummy region, an electrically conductive material over the conductive contacts in the array region and over the electrically insulative material in the dummy region, and an oxide between the electrically conductive material in the dummy region and the electrically insulative material in the dummy region. Related semiconductor devices, systems, and methods are also disclosed.

What is claimed is: 
     
       1. A semiconductor device, comprising:
 an array region; 
 a dummy region; 
 pillars of an electrically insulative material in the array region and the dummy region; 
 electrically conductive contacts between adjacent pillars of the electrically insulative material in the array region; 
 another electrically insulative material between adjacent pillars of the electrically insulative material in the dummy region; 
 an electrically conductive material over the electrically conductive contacts in the array region and over the electrically insulative material in the dummy region; and 
 an oxide directly between and contacting the electrically conductive material in the dummy region and the electrically insulative material in the dummy region, the oxide on at least a portion of sidewalls of the electrically insulative material in the dummy region. 
 
     
     
       2. The semiconductor device of  claim 1 , wherein the electrically insulative material comprises silicon nitride. 
     
     
       3. The semiconductor device of  claim 1 , wherein the electrically conductive contacts comprise polysilicon. 
     
     
       4. The semiconductor device of  claim 1 , wherein the oxide comprises silicon dioxide. 
     
     
       5. The semiconductor device of  claim 1 , wherein the electrically conductive material comprises tungsten. 
     
     
       6. The semiconductor device of  claim 1 , further comprising a capacitor in electrical communication with the electrically conductive material over the electrically conductive contacts, the capacitor laterally aligned with at least one electrically conductive contact of the electrically conductive contacts. 
     
     
       7. The semiconductor device of  claim 1 , wherein an uppermost surface of the electrically insulative material in the array region and the dummy region is higher than an uppermost surface of the another electrically insulative material. 
     
     
       8. The semiconductor device of  claim 1 , wherein an upper portion of the electrically insulative material has a width less than a width of a lower portion of the electrically insulative material. 
     
     
       9. The semiconductor device of  claim 1 , wherein an upper surface of the electrically insulative material is located farther from an underlying substrate than an upper surface of the another electrically insulative material. 
     
     
       10. The semiconductor device of  claim 1 , wherein the another electrically insulative material between adjacent pillars of the electrically insulative material in the dummy region is surrounded by electrically insulative materials. 
     
     
       11. The semiconductor device of  claim 1 , wherein the electrically conductive material in the array region is in electrical communication with the electrically conductive contacts. 
     
     
       12. A semiconductor device, comprising:
 a semiconductor structure; 
 a first insulating material over the semiconductor structure, the first insulating material comprising a first aperture and a second aperture; 
 a conductive material filling the first aperture; 
 a second insulating material filling the second aperture, the second insulating material having a different material composition than the first insulating material; and 
 conductive contacts over the second insulating material and over the conductive material, the conductive contacts over the conductive material separated from the conductive material by a silicide material directly contacting the conductive contacts and the conductive material. 
 
     
     
       13. The semiconductor device of  claim 12 , wherein the first insulating material comprises silicon nitride. 
     
     
       14. The semiconductor device of  claim 12 , wherein the second insulating material comprises silicon dioxide. 
     
     
       15. The semiconductor device of  claim 12 , wherein the first aperture is located within an array region of the semiconductor device. 
     
     
       16. The semiconductor device of  claim 12 , wherein the second aperture is located within a dummy region of the semiconductor device. 
     
     
       17. The semiconductor device of  claim 12 , wherein an upper surface of the first insulating material is higher than an upper surface of the second insulating material. 
     
     
       18. The semiconductor device of  claim 12 , further comprising an oxide between the conductive contacts and the second insulating material, the oxide directly between and contacting the conductive contacts and the second insulating material. 
     
     
       19. A method of forming a semiconductor device, the method comprising:
 removing portions of a first electrically insulative material to recess upper surfaces of the first electrically insulative material relative to upper surfaces of a second electrically insulative material; 
 oxidizing exposed surfaces of the first electrically insulative material to form an oxide material over the first electrically insulative material in an array region and a dummy region of the semiconductor device, the oxide material on at least a portion of sidewalls of the first electrically insulative material; 
 forming a mask material on the oxide material in the dummy region of the semiconductor device; 
 removing the second electrically insulative material from the array region of the semiconductor device to form pillars of the first electrically insulative material in the array region and leave the second electrically insulative material between adjacent pillars of the first electrically insulative material in the dummy region; 
 removing the mask material; 
 forming electrically conductive contacts over the semiconductor device and between the pillars of the first electrically insulative material in the array region; and 
 forming an electrically conductive material over the electrically conductive contacts in the array region and over the oxide material over the first electrically insulative material in the dummy region, the oxide material directly between and contacting the electrically conductive material and the first electrically insulative material in the dummy region. 
 
     
     
       20. The method of  claim 19 , wherein forming a mask material on the oxidized surfaces of the first electrically insulative material comprises bonding the mask material to the oxidized surfaces of the first electrically insulative material. 
     
     
       21. The method of  claim 19 , wherein forming a mask material comprises forming a photoresist material. 
     
     
       22. The method of  claim 19 , wherein oxidizing exposed surfaces of the first electrically insulative material comprises oxidizing exposed surfaces of the first electrically insulative material comprising silicon nitride. 
     
     
       23. A system comprising:
 at least one processor device operably coupled to at least one input device and at least one output device; 
 a semiconductor device operably coupled to the at least one processor device, the semiconductor device comprising:
 pillars of a first electrically insulative material extending from a base structure; 
 an electrically conductive material between adjacent pillars of the first electrically insulative material in an array region; 
 a second electrically insulative material between adjacent pillars of the first electrically insulative material in a dummy region; 
 another electrically conductive material over the electrically conductive material in the array region and over the second electrically insulative material in the dummy region; 
 an oxide between the another electrically conductive material and the first electrically insulative material in the dummy region, a portion of the oxide contacting sidewalls of the first electrically insulative material; and 
 memory storage elements in communication with the another electrically conductive material in the array region and in dummy region.