Electronic device and method for fabricating the same

Abstract

An electronic device and a method for fabricating the same are provided. An electronic device according to an implementation of the disclosed technology is an electronic device including a semiconductor memory, wherein the semiconductor memory includes: a plurality of first lines extending in a first direction; a plurality of second lines extending in a second direction that intersects with the first direction; a plurality of variable resistance elements disposed between the first lines and the second lines and located at intersections of the first lines and the second lines; and a plug connected to a first portion of each of the first lines, wherein the plug comprises a conductive layer and a material layer having a resistance value higher than that of the conductive layer.

What is claimed is: 
     
       1. A method for fabricating an electronic device including a semiconductor memory, the method comprising:
 forming a plug over a substrate, the plug comprising a conductive layer and a material layer having a resistance value higher than that of the conductive layer; 
 forming a conductive plug over the substrate; 
 forming a first line over the plug, the first line extending in a first direction; 
 forming a variable resistance element over the first line; and 
 forming a second line over the variable resistance element, the second line extending in a second direction intersecting with the first direction, 
 wherein the conductive layer comprises first and second conductive layers, and the material layer is disposed between the first conductive layer and the second conductive layer, the first and second conductive layers and the material layer being stacked in a direction perpendicular to a top surface of the substrate, 
 wherein the conductive plug is connected to the first line, and 
 wherein the plug has a resistance value higher than that of the conductive plug. 
 
     
     
       2. The method of  claim 1 , wherein the material layer comprises a dielectric material or a semiconductor material. 
     
     
       3. The method of  claim 1 , wherein forming the plug comprises:
 forming an interlayer insulating layer over the substrate; 
 etching the interlayer insulating layer to form a hole passing through the interlayer insulating layer; 
 forming the first conductive layer that fills a lower portion of the hole; and 
 forming the material layer that fills at least a part of a remaining portion of the hole in which the first conductive layer is formed. 
 
     
     
       4. The method of  claim 3 , wherein the material layer fills the part of the remaining portion of the hole, and forming the plug further comprises forming the second conductive layer that entirely fills the remaining portion of the hole after the material layer is formed. 
     
     
       5. The method of  claim 4 , wherein the material layer is formed along sidewalls and a bottom surface of the remaining portion of the hole in which the first conductive layer is formed, and sidewalls and a bottom surface of the second conductive layer are surrounded by the material layer. 
     
     
       6. The method of  claim 1 , wherein forming the plug and the conductive plug comprises:
 forming an interlayer insulating layer over the substrate; 
 selectively etching the interlayer insulating layer to form a first hole that provides a region in which the plug is to be formed, and a second hole that provides a region in which the conductive plug is to be formed; 
 filling the first and second holes with a conductive material; 
 forming a mask pattern having an opening that exposes the first hole; 
 removing a portion of the conductive material in the first hole; and 
 forming the material layer filling at least a part of a portion of the first hole from which the conductive material is removed. 
 
     
     
       7. The method of  claim 6 , wherein the opening has a width larger than that of the first hole. 
     
     
       8. The method of  claim 6 , further comprising forming a plurality of first holes arranged in the second direction, wherein a plurality of openings exposing the plurality of first holes each has a line shape that extends in the second direction. 
     
     
       9. The method of  claim 1 , wherein the plug and the conductive plug are disposed in the first direction with the variable resistance elements disposed therebetween. 
     
     
       10. A method for fabricating an electronic device including a semiconductor memory, the method comprising:
 forming a plug over a substrate, the plug comprising a conductive layer and a material layer having a resistance value higher than that of the conductive layer; 
 forming a conductive plug over the substrate; 
 forming a first line over the plug, the first line extending in a first direction; 
 forming a variable resistance element over the first line; and 
 forming a second line over the variable resistance element, the second line extending in a second direction intersecting with the first direction, 
 wherein the conductive plug is connected to the first line, 
 wherein the plug has a resistance value higher than that of the conductive plug, and 
 wherein forming the plug comprises:
 forming an interlayer insulating layer over the substrate; 
 etching the interlayer insulating layer to form a hole passing through the interlayer insulating layer; 
 forming the material layer that fills a lower portion of the hole; and 
 forming the conductive layer that fills a remaining portion of the hole, 
 wherein the conductive layer and the material layer are stacked in a direction perpendicular to a top surface of the substrate.