Method and system for providing wireless FPGA programming download via a wireless communication block
Abstract
A programmable semiconductor device contains a wireless communication block (“WCB”) capable of facilitating wirelessly field programmable gate array (“FPGA”) programming download as well as functional logic implementation. In one aspect, WCB detects an FPGA access request for initiating an FPGA reconfiguration from a remote system via a wireless communications network. Upon receiving a configuration bitstream for programming the FPGA via the wireless communications network, the configuration bitstream is forwarded from WCB to a configuration download block (“CDB”) for initiating a configuration process. CDB subsequently programs at least a portion of configurable logic blocks (“LBs”) in FPGA in response to the configuration bitstream.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A method of programming a field programmable gate array (“FPGA”) containing a wireless communication block (“WCB”) comprising:
detecting an FPGA access request for initiating an FPGA reconfiguration by the WCB from a remote system via a wireless communications network;
receiving a configuration bitstream for FPGA programming by the WCB from the remote system via the wireless communications network;
forwarding the configuration bitstream to a configuration download block (“CDB”) for initiating a configuration process; and
programming, by the CDB, at least a portion of configurable logic blocks (“LBs”) in the FPGA in response to the configuration bitstream.
2. The method of claim 1 , further comprising identifying a gate-level netlist in accordance with the configuration bitstream.
3. The method of claim 2 , further comprising mapping the gate-level netlist into the FPGA during the configuration process.
4. The method of claim 3 , further comprising verifying and debugging programmed FPGA logic by the CDB in accordance with the gate-level netlist.
5. The method of claim 1 , further comprising editing and compiling the configuration bitstream by a user device coupled to the remote system.
6. The method of claim 5 , further comprising authorizing the remote system to wirelessly transmit the configuration bitstream to the CDB via the WCB for reconfiguration of the FPGA.
7. The method of claim 1 , further comprising selecting a Wi-Fi transceiver from the WCB in response to a wireless control signal for receiving the configuration bitstream.
8. The method of claim 1 , further comprising selecting one of a Bluetooth transceiver, a Wi-Fi transceiver, a cellular transceiver, and a satellite transceiver in the WCB based on a wireless control signal for obtaining the configuration bitstream.
9. The method of claim 1 , wherein detecting an FPGA access request includes obtaining a Wi-Fi signal by a built-in Wi-Fi transceiver of the WCB via a Wi-Fi network.
10. The method of claim 1 , wherein receiving a configuration bitstream includes:
waking up at least some of the LBs by a control circuit in the WCB in accordance with the configuration bitstream; and
processing the configuration bitstream by the CDB in accordance with the FPGA access request.
11. The method of claim 1 , wherein forwarding the configuration bitstream to a CDB includes converting the configuration bitstream formatted in a wireless protocol to an executable netlist.
12. A method of programming a field programmable gate array (“FPGA”) containing a wireless communication block (“WCB”) comprising:
detecting an error by a control circuit of the WCB after completion of FPGA verification process;
sending the error by the WCB to a remote system requesting a fix via a wireless communications network;
receiving a configuration bitstream for reprogramming FPGA for fixing the error by the WCB from the remote system via the wireless communications network;
forwarding the configuration bitstream to a configuration download block (“CDB”) for initiating a configuration process; and
programming, by the CDB, at least a portion of configurable logic blocks (“LBs”) in the FPGA in response to the configuration bitstream.
13. The method of claim 12 , further comprising identifying a gate-level netlist in accordance with the configuration bitstream.
14. The method of claim 13 , further comprising mapping the gate-level netlist into the FPGA for configuring logic functions of the FPGA.
15. The method of claim 12 , further comprising verifying and debugging programmed FPGA logic by the CDB in accordance with the gate-level netlist.
16. The method of claim 12 , further comprising selecting one of a Bluetooth transceiver, a Wi-Fi transceiver, a cellular transceiver, and a satellite transceiver in the WCB according to a wireless control signal for obtaining the configuration bitstream.
17. A device containing an integrated circuit (“IC”) able to be selectively programmed to perform one or more logic functions, the device comprising:
a plurality of configurable logic blocks (“LBs”) able to be selectively programmed to perform one or more logic functions;
a routing fabric coupled the plurality of configurable LBs and configured to selectively route information between the plurality of configurable LBs and input/output ports based on a routing configuration signals;
a configuration download block (“CDB”) coupled to the plurality of configurable LBs and operable to provide programmable information to the plurality of configurable LBs; and
a configurable wireless communication block (“WCB”) coupled to the plurality of configurable LBs and configured to facilitate wireless programming or wireless debugging the plurality of configurable LBs via a wireless communications network.
18. The device of claim 17 , wherein the WCB includes a Wi-Fi transmitter and a Wi-Fi receiver.
19. The device of claim 17 , wherein the CDB includes a memory configured to store configuration data for configuration LBs and routing fabric.
20. The device of claim 17 , wherein the WCB is configured to select one of a selectable Wi-Fi transceiver and a selectable Bluetooth transceiver.
21. A method of verifying a functional logic in a field programmable gate array (“FPGA”) via a wireless communication block (“WCB”), the method comprising:
receiving, by a WCB, a debugging request from a remote device via a wireless communications network;
identifying a first configurable logic block (“LB”) from a plurality of configurable LBs in the FPGA in accordance with the debugging request;
obtaining input data to the first configurable LB and transmitting the input data from the WCB to the remote device via the wireless communications network; and
receiving an output data from the first configurable LB in accordance with the input data and transmitting the output data to the remote device via the wireless communications network.
22. The method of claim 21 , further comprising identifying the FPGA is in a logic access mode.
23. The method of claim 21 , further comprising authorizing the remote device to wirelessly access logic functions of FPGA via the WCB.
24. The method of claim 21 , further comprising selecting a Wi-Fi transceiver from the WCB in response to a wireless control signal for communicating with the remote device.
25. The method of claim 21 , further comprising selecting one of a Bluetooth transceiver, a Wi-Fi transceiver, a cellular transceiver, and a satellite transceiver in the WCB based on a wireless control signal for communicating to the remote device.Cited by (0)
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