Storage device, information processing system, and non-transitory computer-readable storage medium for storing program

Abstract

A storage device includes: a semiconductor memory; and a memory controller coupled to the semiconductor memory and configured to control the semiconductor memory, wherein the memory controller is configured to store information for translating a logical address into a physical address, and execute a dividing process that includes dividing, upon receiving a computational command, the computational command into a plurality of commands based on the information.

What is claimed is: 
     
       1. A software defined solid state device (SSD) comprising:
 an interface configured to be coupled to a host device; 
 a semiconductor memory; and 
 a memory controller coupled to the semiconductor memory, the memory controller being configured to: 
 receive translation information from the host device through the interface, the translation information indicating a relation between a logical address and one or more physical addresses; 
 receive a computational command from the host device through the interface, the computational command including region information indicating a target region defined by a first logical address and a data size, the target region having a data space larger than a predetermined size; and 
 divide the received computational command into a plurality of commands based on the region information and the received translation information by converting the first logical address into corresponding one or more physical addresses in accordance with the received translation information, each of the plurality of commands being a command associated with a respective subregion divided from the target region, the respective subregion having a data space equal to or less than the predetermined size. 
 
     
     
       2. The software defined SSD according to  claim 1 , wherein the memory controller is configured to
 create a plurality of second computational commands based on a single first computational command that specifies an address destination in the semiconductor memory by using a logical address, each of the plurality of second computational commands being configured to specify access destinations in the semiconductor memory on a per-data access size basis, and 
 in accordance with the second computational command, process data stored in the semiconductor memory on the per-data access size basis. 
 
     
     
       3. The software defined SSD according to  claim 1 , wherein the memory controller is configured to receive the information from a transmission source device of the computational command. 
     
     
       4. The software defined SSD according to  claim 3 , wherein the memory controller is configured to receive, prior to executing the computational command, a part of the information to be used for processing of the computational command, from the transmission source device of the computational command. 
     
     
       5. A system comprising:
 an information processing device configured to issue a computational command; and 
 a software defined solid state device (SSD) coupled to the information processing device, the software defined SSD including an interface configured to be coupled to the information processing device, a semiconductor memory, and a memory controller, the memory controller being configured to: 
 receive translation information from the information processing device through the interface, the translation information indicating a relation between a logical address and one or more physical addresses; 
 receive a computational command from the information processing device through the interface, the computational command including region information indicating a target region defined by a first logical address and a data size, the target region having a data space larger than a predetermined size; and 
 divide the received computational command into a plurality of commands based on the region information and the received translation information by converting the first logical address into corresponding one or more physical addresses in accordance with the received translation information, each of the plurality of commands being a command associated with a respective subregion divided from the target region, the respective subregion having a data space equal to or less than the predetermined size. 
 
     
     
       6. A non-transitory computer-readable storage medium for storing a program which causes a processor of a software defined solid state device (SSD) to perform processing for controlling a semiconductor memory of the software defined SSD, the processing comprising:
 receive translation information from a host device through the interface, the translation information indicating a relation between a logical address and one or more physical addresses; 
 receiving a computational command from the host device through the interface, the computational command including region information indicating a target region defined by a first logical address and a data size, the target region having a data space larger than a predetermined size; and 
 dividing the received computational command into a plurality of commands based on the region information and the received translation information by converting the first logical address into corresponding one or more physical addresses in accordance with the received translation information, each of the plurality of commands being a command associated with a respective subregion divided from the target region, the respective subregion having a data space equal to or less than the predetermined size.