P
US11081576B2ActiveUtilityPatentIndex 51

Insulated-gate semiconductor device and method of manufacturing the same

Assignee: FUJI ELECTRIC CO LTDPriority: Feb 25, 2019Filed: Dec 24, 2019Granted: Aug 3, 2021
Est. expiryFeb 25, 2039(~12.6 yrs left)· nominal 20-yr term from priority
Inventors:ISHIKAWA TAKAMASANOGUCHI SEIJI
H10P 50/283H10P 30/204H10P 30/22H10P 30/21H10P 14/6334H10D 64/01306H10D 64/0113H10P 74/207H10W 20/081H10W 20/056H10P 74/273H10P 74/27H10D 30/668H10D 30/0297H10D 30/202H10D 30/012H10D 64/513H10D 62/177H10D 62/137H10D 62/133H10D 62/127H10D 12/038H10D 8/422H10D 12/481H10D 18/00H10D 64/117H10D 62/106H10D 30/635H10D 64/017H10D 30/025H10D 64/685H10D 64/514H01L 29/0821H01L 21/28525H01L 21/76877H01L 29/1004H01L 29/66348H01L 29/7397H01L 29/0804H01L 29/7813H01L 29/66734H01L 29/0696H01L 21/26513H01L 29/66416H01L 21/28035H01L 22/14H01L 21/31116H01L 21/76802H01L 21/02271H01L 29/4236H01L 29/7722H01L 21/266
51
PatentIndex Score
0
Cited by
5
References
12
Claims

Abstract

A method of manufacturing an insulated-gate semiconductor device, includes: digging a gate trench and a dummy trench; burying a dummy electrode in the dummy trench via a gate insulating film and burying a gate electrode in the gate trench via the gate insulating film; exposing an upper portion of the dummy electrode and selectively forming an insulating film for testing so as to cover the gate electrode; depositing a conductive film for testing on the dummy electrode and the insulating film for testing; and selectively testing an insulating property of the gate insulating film in the dummy trench by applying a voltage between the conductive film for testing and the charge transport, region.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. An insulated-gate semiconductor device, comprising:
 a charge transport region of a first conductivity-type; 
 an injection control region of a second conductivity-type provided on the charge transport region; 
 a main charge supply region of the first conductivity-type provided on the injection control region; 
 a dummy electrode buried, via a gate insulating film, in a dummy trench penetrating the main charge supply region and the injection control region to reach the charge transport region; 
 a gate electrode buried, via the gate insulating film, in a gate trench penetrating the main charge supply region and the injection control region to reach the charge transport region; 
 a first interlayer insulating film provided on the gate electrode, having a stacked structure and including a first plurality of insulating films; 
 a second interlayer insulating film provided on the dummy electrode, a number of insulating films included in the first interlayer insulating film being greater by at least one than a number of insulating films included in the second interlayer insulating film; and 
 a main charge supply electrode deposited on the first interlayer insulating film and the second interlayer insulating film, the first interlayer insulating film and the second interlayer insulating film being provided under at least a portion of the main charge supply electrode. 
 
     
     
       2. The insulated-gate semiconductor device of  claim 1 , wherein:
 the first plurality of insulating films include an insulating film for testing provided on the gate electrode, an insulating film for connection provided on the insulating film for testing, and an upper-layer insulating film provided on the insulating film for connection; and 
 the second interlayer insulating film includes a second plurality of insulating films including the insulating film for connection provided on the dummy electrode and the upper-layer insulating film provided on the insulating film for connection provided on the dummy electrode. 
 
     
     
       3. The insulated-gate semiconductor device of  claim 2 , wherein the insulating film for testing and the insulating film for connection are made of an identical material. 
     
     
       4. The insulated-gate semiconductor device of  claim 1 , wherein the first interlayer insulating film is spaced apart from the second interlayer insulating film in a width direction which is perpendicular to a depth direction in which the dummy trench penetrates. 
     
     
       5. The insulated-gate semiconductor device of  claim 1 , wherein the second interlayer insulating film includes an insulating film which is in direct contact with the dummy electrode. 
     
     
       6. The insulated-gate semiconductor device of  claim 1 , wherein
 an insulating film of the second interlayer insulating film extends in a width direction and has a width in the width direction which is less than a width between the gate trench and the dummy trench, and 
 the width direction is perpendicular to a depth direction in which the dummy trench penetrates. 
 
     
     
       7. The insulated-gate semiconductor device of  claim 2 , wherein:
 the insulating film for testing and the insulating film for connection included in the first plurality of insulating films are in direct contact with each other, 
 the insulating film for connection and the upper-layer insulating film included in the first plurality of insulating films are in direct contact with each other, and 
 the insulating film for connection and the upper-layer insulating film included in the second plurality of insulating films are in direct contact with each other. 
 
     
     
       8. The insulated-gate semiconductor device of  claim 1 , wherein:
 the first plurality of insulating films include an insulating film for testing provided on the gate electrode, and an insulating film for connection provided on the insulating film for testing; and 
 the second interlayer insulating film includes the insulating film for connection provided on the dummy electrode. 
 
     
     
       9. A method of manufacturing an insulated-gate semiconductor device, comprising:
 forming an injection control region of a second conductivity-type on a charge transport region of a first conductivity-type; 
 forming a main charge supply region of the first conductivity-type on the injection control region; 
 digging a gate trench and a dummy trench so as to penetrate the main charge supply region and the injection control region; 
 burying a dummy electrode in the dummy trench via a gate insulating film and burying a gate electrode in the gate trench via the gate insulating film; 
 selectively forming an insulating film for testing so as to expose an upper portion of the dummy electrode and cover the gate electrode; 
 depositing a conductive film for testing on the dummy electrode and the insulating film for testing; and 
 selectively testing an insulating property of the gate insulating film in the dummy trench by applying a voltage between the conductive film for testing and the charge transport region. 
 
     
     
       10. The method of  claim 9 , further comprising removing the conductive film for testing after testing the insulating property. 
     
     
       11. The method of  claim 10 , further comprising:
 depositing an insulating film for connection so as to cover the insulating film for testing after removing the conductive film for testing; 
 opening a contact hole in the insulating film for connection; and 
 forming a main charge supply electrode electrically connected to the main charge supply region via the contact hole. 
 
     
     
       12. The method of  claim 10 , further comprising:
 depositing an insulating film for connection so as to cover the insulating film for testing after removing the conductive film for testing; 
 depositing an upper-layer insulating film so as to cover the insulating film for connection; 
 opening a contact hole in each of the insulating film for connection and the upper-layer insulating film; and 
 forming a main charge supply electrode electrically connected to the main charge supply region via the contact holes.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.