US11113437B2ActiveUtilityA1
Joint hardware and controller design
Est. expirySep 30, 2037(~11.1 yrs left)· nominal 20-yr term from priority
G06F 2111/06G06F 30/12G06F 30/23G06F 30/20
47
PatentIndex Score
0
Cited by
23
References
9
Claims
Abstract
A method for designing a product comprising physical hardware and a controller for controlling the physical hardware includes generating a detailed hardware model describing the physical hardware and a controller model corresponding to the controller based on a set of user requirements. An optimal design of the physical hardware and the controller is determined by solving a multi-objective optimization problem comprising a first objective function defining hardware design objectives, and a second objective function defining objectives for the controller model for the physical hardware.
Claims
exact text as granted — not AI-modifiedWe claim:
1. A system for designing a product comprising physical hardware and a controller for controlling the physical hardware, wherein the system comprises:
a computer-readable medium comprising a detailed hardware model corresponding to the physical hardware and a controller model corresponding to the controller;
a receiver module configured to receive one or more user requirements via a user input device;
an optimization module configured to jointly optimize the detailed hardware model and the controller model over a plurality of iterations, wherein each iteration comprises (i) optimizing of the detailed hardware model with respect to the one or more user requirements; (ii) matching the detailed hardware model to a reduced order model of the detailed hardware model; and (iii) optimizing the controller model with respect to the reduced order model of the detailed hardware model.
2. The system of claim 1 , wherein the optimization module jointly optimizes the detailed hardware model and the controller model using a process comprising:
determining an optimal design of the physical hardware and the controller by solving a multi-objective optimization problem comprising:
a first objective function defining hardware design objectives,
a second objective function defining objectives for the controller model for the physical hardware, and
a third objective function that minimizes the differences between the reduced order model of the detailed hardware model and the detailed hardware model.
3. The system of claim 2 , wherein the detailed hardware model is a finite element model of the physical hardware.
4. The system of claim 3 , wherein the reduced order model of the detailed hardware model is a low-order linear model obtained through reduction of the finite element model of the physical hardware.
5. A method for designing a product comprising physical hardware and a controller for controlling the physical hardware, wherein the method comprises:
generating a detailed hardware model corresponding to the physical hardware and a controller model corresponding to the controller;
receiving one or more user requirements via a user input device;
jointly optimizing the detailed hardware model and the controller over a plurality of iterations, wherein each iteration comprises (i) optimizing of the detailed hardware model with respect to one or more user requirements; (ii) matching of the detailed hardware model to a reduced order model of the detailed hardware model; and (iii) optimizing the controller model with respect to the reduced order model of the detailed hardware model.
6. The method of claim 5 , wherein the optimization module jointly optimizes the detailed hardware model and the controller model using a process comprising:
determining an optimal design of the physical hardware and the controller by solving a multi-objective optimization problem comprising:
a first objective function defining hardware design objectives,
a second objective function defining objectives for the controller model for the physical hardware, and
a third objective function that minimizes the differences between the reduced order model of the detailed hardware model and the detailed hardware model.
7. The method of claim 6 , wherein the detailed hardware model is a finite element model of the physical hardware.
8. The method of claim 7 , wherein the reduced order model of the detailed hardware model is a low-order linear model obtained through reduction of the finite element model of the physical hardware.
9. The method of claim 5 , wherein generating the detailed hardware model comprises:
using an optimization of the reduced order model is used to minimize an error between the detailed hardware model and the reduced order model.Join the waitlist — get patent alerts
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