Digital step attenuator

Abstract

Various embodiments of the invention relate to attenuators with reduced temperature variation. By coordinating first-order resistance temperature (FORT) coefficients of resistors, embodiments of attenuator or attenuator cells are capable of achieving desired attenuation with reduced or minimized temperature variation. Such achievements in reducing temperature variation may be obtained without relying on resistors with large negative FORT coefficients. Attenuator cells may be configured as T-type attenuator cells, π-type attenuator cells, bridged-T attenuator cells, or shunt attenuators with various FORT coefficient combinations for the resistors incorporated within the attenuator cells. Furthermore, various attenuator cells may be cascaded together into a digital step attenuator with the temperature variation of those cells compensating or offsetting each other for an overall minimum temperature variation.

The invention claimed is: 
     
       1. A digital step attenuator comprising:
 a first resistor and a second resistor coupled in series between an RF input port and an RF output port, the first resistor and the second resistor each has a first-order resistance temperature (FORT) coefficient with a positive value; 
 a shunt resistor coupled to a node interposed between the first resistor and the second resistor, the shunt resistor has a FORT coefficient with an absolute value at least one order of magnitude smaller than the positive value for the FORT coefficient of the first resistor and the positive value for the FORT coefficient of the second resistor; 
 a shunt switch coupled between the shunt resistor and a ground; and 
 a bypass switch coupled between the RF input port and the RF output port, the attenuator is engaged for signal attenuation when the bypass switch is switched off and the shunt switch is switch on. 
 
     
     
       2. The digital step attenuator of  claim 1  wherein the first resistor, the second resistor, and the shunt resistor all have positive FORT coefficients. 
     
     
       3. The digital step attenuator of  claim 1  further comprising:
 a capacitor coupled in parallel with the shunt resistor. 
 
     
     
       4. The digital step attenuator of  claim 2  wherein the FORT coefficients for the first resistor and the second resistor have the same value. 
     
     
       5. The digital step attenuator of  claim 1  wherein the shunt switch and the bypass switch each have an ON resistance with a positive FORT coefficient. 
     
     
       6. The digital step attenuator of  claim 3  wherein the first resistor and the second resistor have the same resistance value. 
     
     
       7. A digital step attenuator comprising:
 a first resistor and a second resistor coupled in series between an RF input port and an RF output port, the first resistor and the second resistor each has a first-order resistance temperature (FORT) coefficient; 
 a shunt resistor coupled to a node interposed between the first resistor and the second resistor; 
 a shunt switch coupled between the shunt resistor and a ground; and 
 a bypass switch coupled between the RF input port and the RF output port, the attenuator is engaged for signal attenuation when the bypass switch is switched off and the shunt switch is switch on; 
 wherein the FORT coefficient of the shunt resistor has a positive value, each of the FORT coefficients of the first resistor and the second resistor have an absolute value at least one order of magnitude smaller than the positive value for the FORT coefficient of the shunt resistor. 
 
     
     
       8. A digital step attenuator comprising:
 one or more attenuator cells coupled in series between an RF input port and an RF output port, each attenuator cell comprising:
 a first resistor and a second resistor coupled in series; and 
 a first shunt resistor coupled to a node interposed between the first resistor and the second resistor, the first resistor, the second resistor, and the first shunt resistor each have a first-order resistance temperature (FORT) coefficient; 
 
 a shunt attenuator cell coupled in series with the one or more attenuator cells, the shunt attenuator cell comprising:
 a second shunt resistor; 
 a shunt switch coupled between the second shunt resistor and ground, the shunt switch has an ON resistance with a positive FORT coefficient. 
 
 
     
     
       9. The digital step attenuator of  claim 8  wherein each attenuator cell further comprising:
 a first shunt switch coupled between the first shunt resistor and ground; and 
 a bypass switch coupled in parallel with the first resistor and the second resistor, the attenuator cell is engaged for signal attenuation when the bypass switch is switched off and the first shunt switch is switch on. 
 
     
     
       10. The digital step attenuator of  claim 9  wherein the one or more attenuator cells comprise one attenuator cell with the first resistor, the second resistor, and the shunt resistor all having FORT coefficients with the positive value. 
     
     
       11. The digital step attenuator of  claim 9  wherein the shunt switch and the bypass switch each have an ON resistance with a positive FORT coefficient. 
     
     
       12. The digital step attenuator of  claim 8  wherein the shunt resistor in the shunt attenuator cell has a FORT coefficient with an absolute value at least one order of magnitude smaller than the positive FORT coefficient of the ON resistance of the shunt switch. 
     
     
       13. A digital step attenuator comprising:
 a first attenuator cell comprising one or more resistors, the first attenuator cell has an attenuation increasing with temperature; and 
 a second attenuator cell coupled in series to the first attenuation cell, the second attenuator cell comprising one or more resistors, the second attenuator cell has an attenuation decreasing with temperature to compensate the first attenuator cell such that an overall temperature variation of the attenuator is lowered. 
 
     
     
       14. The digital step attenuator of  claim 13  wherein the first attenuator cell comprising:
 a first resistor and a second resistor coupled in series; and 
 a first shunt resistor coupled to a node interposed between the first resistor and the second resistor, the first shunt resistor has a positive first-order resistance temperature (FORT) coefficient; 
 wherein the first resistor and the second resistor each have a FORT coefficient with an absolute value at least one order of magnitude smaller than the positive FORT coefficient of the first shunt resistor. 
 
     
     
       15. The digital step attenuator of  claim 14  wherein the second attenuator cell comprising:
 a third resistor and a fourth resistor coupled in series, the third resistor and the fourth resistor each have a positive FORT coefficients; and 
 a second shunt resistor coupled to a node interposed between the third resistor and the fourth resistor, the second shunt resistor has a FORT coefficient with an absolute value at least one order of magnitude smaller than the positive FORT coefficients of the first resistor and the second resistor. 
 
     
     
       16. The digital step attenuator of  claim 13  further comprising:
 a third first attenuator cell coupled in series with the first attenuator cell and the second attenuator cell, the third first attenuator cell comprising:
 a fifth resistor and a sixth resistor coupled in series; and 
 a third shunt resistor coupled between a node interposed between the fifth and the sixth resistors, the fifth resistor, the sixth resistor and the third shunt resistor all have positive first-order resistance temperature (FORT) coefficients.