US11138107B2ActiveUtilityA1

Modifying subsets of memory bank operating parameters

57
Assignee: MICRON TECHNOLOGY INCPriority: Feb 20, 2020Filed: Feb 20, 2020Granted: Oct 5, 2021
Est. expiryFeb 20, 2040(~13.6 yrs left)· nominal 20-yr term from priority
G11C 2029/4402G11C 29/84G11C 29/789G11C 29/785G11C 29/4401G11C 29/028G11C 29/023G11C 29/021G11C 29/12005G06F 3/0629G06F 12/0692G06F 2212/1016G11C 29/50G11C 11/5628G11C 17/16G11C 17/18
57
PatentIndex Score
0
Cited by
5
References
25
Claims

Abstract

Methods, systems, and devices for modifying subsets of memory bank operating parameters are described. First global trimming information may be configured to adjust a first subset of operating parameters for a set of memory banks within a memory system. Second global trimming information may be configured to adjust a second subset of operating parameters for the set of memory banks. Local trimming information may be used to adjust one of the subsets of the operating parameters for a subset of the memory banks. To adjust one of the subsets of the operating parameters, the local trimming information may be combined with one of the first or second global trimming information to yield additional local trimming information that is used to adjust a corresponding subset of the operating parameters at the subset of the memory banks.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method, comprising:
 identifying, for a plurality of memory banks having a first operating parameter and a second operating parameter, a first global trim parameter having a first value for the first operating parameter and a second global trim parameter having a second value for the second operating parameter; 
 identifying, for a memory bank of the plurality of memory banks, information for adjusting one of the first global trim parameter or the second global trim parameter, wherein a first local trim parameter or a second local trim parameter for the memory bank is generated based at least in part on the information for adjusting; 
 receiving, for the memory bank, an indication that the information for adjusting is associated with the first operating parameter; 
 combining, for the memory bank, the information for adjusting with the first global trim parameter based at least in part on receiving the indication, wherein the first local trim parameter having a third value is generated based at least in part on the combining; and 
 performing, by the memory bank, a memory operation based at least in part on the combining, wherein, during the memory operation, a magnitude of the first operating parameter at the memory bank is based at least in part on the third value of the first local trim parameter. 
 
     
     
       2. The method of  claim 1 , further comprising:
 storing, in a latch associated with the memory bank, the information for adjusting. 
 
     
     
       3. The method of  claim 1 , further comprising:
 storing, in a plurality of latches associated with the memory bank or outside of the memory bank, the first value of the first global trim parameter, the second value of the second global trim parameter, and the indication. 
 
     
     
       4. The method of  claim 1 , wherein the combining further comprises:
 applying an exclusive OR operation to the first value of the first global trim parameter and the information for adjusting, wherein the third value of the first local trim parameter is equivalent to a resulting value of the exclusive OR operation. 
 
     
     
       5. The method of  claim 1 , wherein the combining further comprises:
 appending the information for adjusting to the first value of the first global trim parameter, wherein the third value of the first local trim parameter is equivalent to a resulting value of the appending, and wherein the third value results in a finer adjustment to the first operating parameter than the first value. 
 
     
     
       6. The method of  claim 1 , further comprising:
 signaling the first value of the first global trim parameter to a first logic component associated with the memory bank and the second value of the second global trim parameter to a second logic component associated with the memory bank, wherein the first logic component is associated with the first operating parameter and the second logic component is associated with the second operating parameter; and 
 signaling the information for adjusting to the first logic component based at least in part on receiving the indication that the information is associated with the first operating parameter. 
 
     
     
       7. The method of  claim 6 , further comprising:
 signaling, to the second logic component, information for preserving the second value of the second global trim parameter based at least in part on receiving the indication that the information is associated with the first operating parameter. 
 
     
     
       8. The method of  claim 7 , wherein the combining further comprises:
 applying, by the second logic component, an exclusive OR operation to the second value of the second global trim parameter and the information for preserving, wherein the second value is equivalent to a resulting value of the exclusive OR operation. 
 
     
     
       9. The method of  claim 1 , further comprising:
 performing, by a second memory bank of the plurality of memory banks, a second memory operation after the combining, wherein, during the memory operation, a second magnitude of the first operating parameter at the second memory bank is based at least in part on the first value of the first global trim parameter without using the information for adjusting. 
 
     
     
       10. The method of  claim 1 , wherein:
 the first value of the first global trim parameter is configured to adjust or set the magnitude of the first operating parameter, 
 the second value of the second global trim parameter is configured to adjust or set the magnitude of the second operating parameter, and 
 the third value of the first local trim parameter is configured to adjust or set the magnitude of the first operating parameter measured for the memory bank. 
 
     
     
       11. The method of  claim 1 , further comprising:
 storing the first value of the first global trim parameter, the second value of the second global trim parameter, and the indication in a first fuse set; 
 storing the information for adjusting one of the first value or the second value in a second fuse set; 
 determining that a performance level of the memory bank is increased when the first operating parameter is modified relative to when the second operating parameter is modified; and 
 storing information for adjusting the first value in the second fuse set based at least in part on the determining. 
 
     
     
       12. The method of  claim 1 , further comprising:
 receiving, for the memory bank, the first value of the first global trim parameter, the second value of the second global trim parameter, and the indication from a first fuse set; 
 receiving, for the memory bank, the information for adjusting one of the first value or the second value from a second fuse set; and 
 receiving, for the memory bank, an address of a defective memory location from the second fuse set. 
 
     
     
       13. The method of  claim 1 , further comprising:
 receiving, for the memory bank, the first value of the first global trim parameter from a first fuse set, the second value of the second global trim parameter from a second fuse set, and the indication from a third fuse set. 
 
     
     
       14. A method, comprising:
 storing, for a plurality of memory banks, a first global trim parameter and a second global trim parameter; 
 storing, for a memory bank of the plurality of memory banks, information for adjusting one of the first global trim parameter or the second global trim parameter, wherein a first local trim parameter and a second local trim parameter for the memory bank are generated based at least in part on the information for adjusting one of the first global trim parameter or the second global trim parameter; 
 determining, at the memory bank, that the information is for adjusting a value of the first global trim parameter; and 
 combining the information for adjusting with the first global trim parameter based at least in part on the determining, wherein the first local trim parameter is generated based at least in part on the combining. 
 
     
     
       15. The method of  claim 14 , further comprising:
 storing an indication that the information for adjusting is associated with the first global trim parameter; and 
 signaling the indication to a multiplexing component that determines the information for adjusting is for adjusting the first global trim parameter based at least in part on receiving the indication. 
 
     
     
       16. The method of  claim 14 , further comprising:
 signaling the first global trim parameter to a first logic component; and 
 signaling, by a second logic component, the information for adjusting to the first logic component based at least in part on the determining. 
 
     
     
       17. The method of  claim 16 , further comprising:
 signaling the second global trim parameter to a third logic component; and 
 signaling, by the second logic component, information for preserving the second global trim parameter to the third logic component based at least in part on the determining. 
 
     
     
       18. The method of  claim 14 , wherein:
 the first global trim parameter and the first local trim parameter are associated with a first operating parameter of the plurality of memory banks, and 
 the second global trim parameter and the second local trim parameter are associated with a second operating parameter of the plurality of memory banks. 
 
     
     
       19. The method of  claim 14 , wherein:
 performing, by the memory bank, a memory operation based at least in part on the adjusting, wherein, during the memory operation, a first magnitude of a first operating parameter associated with the memory bank corresponds to the first local trim parameter and a second magnitude of a second operating parameter associated with the memory bank corresponds to the second global trim parameter. 
 
     
     
       20. An apparatus, comprising:
 a plurality of memory banks having a plurality of operating parameters; 
 a first plurality of latches common to the plurality of memory banks and configured to store a first plurality of values for the plurality of operating parameters; 
 a second plurality of latches associated with a memory bank of the plurality of memory banks and configured to store a second plurality of values for the plurality of operating parameters; 
 a first latch associated with the memory bank and configured to store information for adjusting a subset of the first plurality of values to generate the second plurality of values; 
 a second latch configured to store an indication of the subset of the first plurality of values; and 
 a multiplexing component configured to receive the indication and signal the information for adjusting to the indicated subset of the first plurality of values. 
 
     
     
       21. The apparatus of  claim 20 , further comprising:
 a first logic component configured to receive and combine a first value of the first plurality of values and a first output of the multiplexing component that comprises the information for adjusting; and 
 a second logic component configured to receive and combine a second value of the first plurality of values and a second output of the multiplexing component. 
 
     
     
       22. The apparatus of  claim 21 , wherein the first logic component comprises a first exclusive OR gate and the second logic component comprises a second exclusive OR gate. 
     
     
       23. The apparatus of  claim 21 , wherein the multiplexing component is further configured to signal information for preserving the remaining subset of the first plurality of values, and wherein the second output comprises the information for preserving. 
     
     
       24. The apparatus of  claim 20 , further comprising:
 a buffering component configured to decouple the first plurality of latches from the first latch, wherein the buffering component is configured to activate the first plurality of latches during a first time period for broadcasting the first plurality of values and to activate the second plurality of latches during a different time period for broadcasting the second plurality of values. 
 
     
     
       25. The apparatus of  claim 20 , further comprising:
 a first fuse set configured to store the first plurality of values; and 
 a second fuse set configured to the information for adjusting.

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