Method and apparatus for reading detector arrays

Abstract

A solution for reading detector arrays is disclosed. The solution comprises generating (400) an excitation signal, varying (402) the frequency of the excitation signal in time, supplying (404) the excitation signal to a detector array comprising a set of thermal detectors. The number of detectors corresponds to the frequencies of the excitation signal. In the solution, the signal is demodulated (406) at the output of the detector array and time-multiplexed base band signal is obtained. An analogue to digital conversion is performed (408) to the time-multiplexed base band signal and the base band signal is demultiplexed (410) to obtain a set of detector signals.

The invention claimed is: 
     
       1. A method of for reading detector arrays, comprising
 generating an excitation signal; 
 varying the frequency of the excitation signal in time; 
 supplying the excitation signal to a detector array comprising a set of thermal detectors, wherein the number of detectors corresponds to the frequencies of the excitation signal; 
 demodulating the signal at the output of the detector array and obtaining time-multiplexed base band signal; 
 performing analogue to digital conversion to the time-multiplexed base band signal; and 
 demultiplexing the base band signal to obtain a set of detector signals. 
 
     
     
       2. The method as claimed in  claim 1 , wherein the frequency of the excitation signal is switched through a given set of frequencies during a given time frame τ F . 
     
     
       3. The method as claimed in  claim 1 , wherein the frequency of the excitation signal is kept at each frequency of the given set of frequencies for the duration of a given slot time τ S . 
     
     
       4. The method as claimed in  claim 2 , wherein the frame rate 1/τ F  of the frequency of the excitation signal is higher than the thermal cut-off frequency of the thermal detectors in the detector array. 
     
     
       5. The method as claimed in  claim 1 , further comprising: amplifying the signal at the output of the detector array prior demodulation. 
     
     
       6. An arrangement for reading detector arrays, comprising
 a signal generator configured to generate an excitation signal, vary the frequency of the excitation signal in time and supply the excitation signal to a detector arrays comprising a set of thermal detectors, wherein the number of detectors corresponds to the frequencies of the excitation signal; 
 a demodulator configured to demodulate the signal at the output of the detector array and obtain a time-multiplexed base band signal; 
 a converter configured to perform analogue to digital conversion to the time-multiplexed base band signal; and 
 a demultiplexer configured to demultiplex the base band signal to obtain a set of detector signals. 
 
     
     
       7. The arrangement as claimed in  claim 6 , wherein the signal generator configured to switch the excitation signal through a given set of frequencies during a given time frame τ F  and keep the frequency of the excitation signal at each frequency of the given set of frequencies for the duration of a given slot time τ s . 
     
     
       8. The arrangement as claimed in  claim 7 , wherein the frame rate 1/τ F  of the frequency of the excitation signal is higher than the thermal cut-off frequency of the thermal detectors in the detector array. 
     
     
       9. The arrangement as claimed in  claim 6 , further comprising: an amplifier configured to amplify the signal at the output of the detector array prior demodulation. 
     
     
       10. The arrangement as claimed in  claim 6 , further comprising: a controller configured to control frequency of the signal generator. 
     
     
       11. The arrangement as claimed in  claim 6 , wherein the demodulator comprises a mixer and the excitation signal is fed as an input to a local oscillator input port of the mixer and the signal at the output of the detector array is fed to the radio frequency port of the mixer. 
     
     
       12. The arrangement according to  claim 11  where the mixer is a two-component (IQ) mixer. 
     
     
       13. The arrangement according to  claim 11  where the mixer is a single component mixer. 
     
     
       14. The arrangement according to  claim 13 , further comprising a delay line in front of the local oscillator input port of the mixer. 
     
     
       15. The arrangement according to  claim 12 , further comprising a programmable summing circuit connected to the baseband I and Q outputs of the two-component mixer. 
     
     
       16. The arrangement as claimed in  claim 11 , wherein the mixer is replaced by a digital circuit performing a multiplication function.