Time-shifted seed for random number generator

Abstract

A pseudorandom number is obtained from a pseudorandom number generator. A first register input is created using the pseudorandom number. The first register input is inserted into a shift register which also comprises a second register input. A first digit of the first register input and a second digit of the second register input are selected from the shift register. A seed is created using the first digit and the second digit. The seed is input into the pseudorandom number generator. A newly generated pseudorandom number is obtained from the pseudorandom number generator.

What is claimed is: 
     
       1. A method comprising:
 obtaining, from a pseudorandom number generator, a first pseudorandom number; 
 creating, using the pseudorandom number, a first register input; 
 inserting the first register input into a shift register, wherein the shift register comprises a second register input; 
 selecting, from the shift register, a first digit of the first register input; 
 selecting, from the shift register, a second digit of the second register input; 
 creating a seed using the first digit and second digit; 
 inputting the seed into the pseudorandom number generator; 
 obtaining, from the pseudorandom number generator, a newly generated pseudorandom number; and 
 inputting the newly generated pseudorandom number into the shift register, wherein the inputting the newly generated pseudorandom number into the shift register causes the first register input to shift in the shift register and the second register input to be erased from the shift register. 
 
     
     
       2. The method of  claim 1 , wherein creating the seed using the first digit and the second digit comprises inputting the first digit and the second digit into a logic gate. 
     
     
       3. The method of  claim 1 , wherein the first register input is the first pseudorandom number and the second register input is the newly generated pseudorandom number. 
     
     
       4. The method of  claim 1 , wherein the shift register contains a set of pseudorandom numbers and wherein the seed is based on the contents of each pseudorandom number in the set of pseudorandom numbers. 
     
     
       5. The method of  claim 1 , wherein the pseudorandom number comprises a number of bits, and wherein the shift register comprises a number of rows that is equal to the number of bits and a number of columns that is equal to the number of bits. 
     
     
       6. The method of  claim 5 , wherein the number of bits is 64 bits. 
     
     
       7. A pseudorandom-number-generation system comprising:
 a pseudorandom number generator, an input of which is a seed and an output of which is used to form a register input; 
 a shift register, the input of which is the register input, wherein the shift register comprises:
 a first set of logic gates, wherein each logic gate in the first set of logic gates comprises a digit of a second register input a set of register inputs; and 
 a second set of logic gates, wherein each logic gate in the second set of logic gates comprises a digit of a third register input a set of register inputs; and 
 
 a processor configured to create the seed based on contents of the first set of logic gates and the second set of logic gates; 
 wherein the pseudorandom number generator is configured to output a pseudorandom number that is used to create a fourth register input, and wherein inserting the fourth register input into the shift register causes the third register input to shift out of the second set of logic gates, the second register input to shift into the second set of logic gates, and the fourth register input to shift into the first set of logic gates. 
 
     
     
       8. The pseudorandom-number-generation system of  claim 7 , further comprising:
 a system clock configured to govern the timing of the pseudorandom-number-generation system. 
 
     
     
       9. The pseudorandom-number-generation system of  claim 7 , wherein the processor is configured to select a single digit from each register input in the set of register inputs to form a register output using the selected digits. 
     
     
       10. The system of  claim 9 , wherein the register output equals the seed. 
     
     
       11. The system of  claim 9 , wherein the register output is used to create the seed. 
     
     
       12. The system of  claim 7 , wherein the second register input comprises a number of bits and wherein the shift register comprises a number of rows of logic gates that is equal to the number of bits and a number of columns of logic gates that is equal to the number of bits. 
     
     
       13. A computer program product, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a computer to cause the computer to:
 obtain, from a pseudorandom number generator, a first pseudorandom number; 
 create, using the pseudorandom number, a first register input; 
 insert the first register input into a shift register, wherein the shift register comprises a second register input; 
 select, from the shift register, a first digit of the first register input; 
 select, from the shift register, a second digit of the second register input; 
 create a seed using the first digit and second digit; 
 input the seed into the pseudorandom number generator; 
 obtain, from the pseudorandom number generator, a newly generated pseudorandom number; and 
 input the newly generated pseudorandom number into the shift register, wherein the inputting the newly generated pseudorandom number into the shift register causes the first register input to shift in the shift register and the second register input to be erased from the shift register. 
 
     
     
       14. The computer program product of  claim 13 , wherein creating the seed using the first digit and the second digit comprises inputting the first digit and the second digit into a logic gate. 
     
     
       15. The computer program product of  claim 13 , wherein the first register input is the first pseudorandom number and the second register input is the second pseudorandom number. 
     
     
       16. The computer program product of  claim 13 , wherein the shift register contains a set of pseudorandom numbers and wherein the seed is based on the contents of each pseudorandom number in the set of pseudorandom numbers. 
     
     
       17. The computer program product of  claim 13 , wherein the pseudorandom number comprises a number of bits, and wherein the shift register comprises a number of rows that is equal to the number of bits and a number of columns that is equal to the number of bits.