Image sensor and camera module including the same

Abstract

An image sensor includes a pixel array; a logic circuit configured to convert an image signal generated from the pixel array during a first period into image data; and a memory. The image data may be written in the memory during a second period, of which at least a portion overlaps the first period. The logic circuit may write dummy data in the memory during a third period overlapping the first period and not overlapping the second period.

What is claimed is: 
     
       1. An image sensor, comprising:
 a pixel array; 
 a logic circuit configured to convert an image signal generated from the pixel array during a first period into image data; and 
 a memory, wherein the image data are written in the memory during a second period, of which at least a portion overlaps the first period, 
 wherein the logic circuit writes dummy data in the memory during a third period overlapping the first period and not overlapping the second period. 
 
     
     
       2. The image sensor as claimed in  claim 1 , wherein the image signal includes line signals respectively generated from lines of the pixel array, and
 wherein the logic circuit generates the image data including line data corresponding to each of the lines of the pixel array based on a ramp signal and the line signals. 
 
     
     
       3. The image sensor as claimed in  claim 2 , wherein the logic circuit writes the dummy data in the memory from a time when a line signal first output from the pixel array from among the line signals is converted into line data to a time when the converted line data are written in the memory. 
     
     
       4. The image sensor as claimed in  claim 1 , wherein, when line data of the image data are generated, the logic circuit writes line data generated before the line data of the image data in the memory or writes the dummy data in the memory. 
     
     
       5. The image sensor as claimed in  claim 1 , wherein the pixel array includes:
 active pixels configured to generate a first signal of the image signal based on a light received from an outside; and 
 optical black pixels configured to generate a second signal of the image signal as the light is blocked, and 
 wherein, during the first period, the logic circuit converts the first signal to generate first data of the image data and converts the second signal to generate second data of the image data. 
 
     
     
       6. The image sensor as claimed in  claim 5 , wherein the first period includes a fourth period when the first data are generated, and a fifth period when the second data are generated, and
 wherein the third period includes a sixth period before the second period, and a seventh period between the fourth period and the fifth period. 
 
     
     
       7. The image sensor as claimed in  claim 6 , wherein the fifth period is before the fourth period, the sixth period at least partially overlaps the fifth period, and the seventh period at least partially overlaps the fourth period. 
     
     
       8. The image sensor as claimed in  claim 5 , wherein, after the second period, the logic circuit reads the image data from the memory and outputs the first data to a processor. 
     
     
       9. The image sensor as claimed in  claim 1 , wherein the pixel array is formed at a first substrate, the logic circuit is formed at a second substrate, and the memory is formed at a third substrate facing the first substrate with the second substrate interposed therebetween. 
     
     
       10. An image sensor, comprising:
 a pixel array; and 
 a logic circuit configured to convert an image signal generated from the pixel array into image data during a first period, to output the image data to a memory during a second period at least partially overlapping the first period, and to output dummy data to the memory during a part of the first period that does not overlap the second period. 
 
     
     
       11. The image sensor as claimed in  claim 10 , wherein the logic circuit includes:
 an analog-to-digital converter configured to convert the image signal to the image data; and 
 an interface circuit configured to output the image data or the dummy data to the memory. 
 
     
     
       12. The image sensor as claimed in  claim 10 , wherein the logic circuit generates the image data based on the image signal and a ramp signal, and outputs at least the image data or the dummy data to the memory when the ramp signal has a slope. 
     
     
       13. The image sensor as claimed in  claim 10 , wherein the logic circuit outputs the image data or the dummy data to the memory during the first period, in a first mode, and
 wherein the logic circuit blocks an output of the image data to the memory or outputs the image data to a processor, in a second mode. 
 
     
     
       14. The image sensor as claimed in  claim 13 , wherein a period when the image signal is converted into the image data in the first mode is shorter than a period when the image signal is converted into the image data in the second mode. 
     
     
       15. The image sensor as claimed in  claim 10 , wherein the logic circuit is interposed between the pixel array and the memory. 
     
     
       16. The image sensor as claimed in  claim 10 , wherein the pixel array is formed at a first substrate, the logic circuit is formed at a second substrate, and the first substrate is disposed on the second substrate. 
     
     
       17. The image sensor as claimed in  claim 10 , wherein the pixel array includes:
 active pixels configured to generate a first signal of the image signal based on a light received from an outside; and 
 optical black pixels configured to generate a second signal of the image signal as the light is blocked, and 
 wherein, during the first period, the logic circuit converts the first signal to generate first data of the image data, converts the second signal to generate second data of the image data, and outputs the dummy data or the second data to the memory when the first data and the second data are generated. 
 
     
     
       18. The image sensor as claimed in  claim 10 , wherein, after the second period, the logic circuit receives the image data from the memory and outputs the received image data to a processor. 
     
     
       19. A camera module, comprising:
 a lens configured to transfer an external light; 
 a pixel array configured to generate an image signal based on the transferred light; 
 a logic circuit configured to convert the image signal into image data during a first period and to output the image data during a second period; and 
 a memory configured to store the output image data during the second period, in a first mode, 
 wherein, in the first mode, the logic circuit outputs the image data to the memory during the second period, and outputs dummy data to the memory during a third period overlapping the first period and not overlapping the second period, and 
 wherein, in a second mode, the logic circuit outputs the image data to an outside during the second period. 
 
     
     
       20. The camera module as claimed in  claim 19 , further comprising:
 a reflecting element configured to receive the light from a first direction and to reflect the received light in a second direction so as to be output to the lens.