Systems and methods for memory refresh

Abstract

A memory device includes a memory bank having a set of word lines, a bank control block coupled to the memory bank, wherein the bank control block when in operation provides timing control and data control to facilitate execution of commands to and from the memory bank and a command decoder coupled to the bank control block. The command decoder when in operation transmits to the bank control block a refresh (REF) command associated with a first pump to refresh a memory cell of the memory bank and a row hammer refresh (RHR) command associated with a second pump to refresh a second memory cell of the memory bank in conjunction with a refresh operation, and the bank control block when in operation transmits a first control signal to the command decoder to determine which automatic error check and scrub (AECS) mode operation is selected.

What is claimed is: 
     
       1. A memory device, comprising:
 a memory bank comprising a set of word lines; 
 a bank control block coupled to the memory bank, wherein the bank control block when in operation provides timing control and data control to facilitate execution of commands to and from the memory bank; and 
 a command decoder coupled to the bank control block, wherein the command decoder when in operation transmits to the bank control block a refresh (REF) command associated with a first pump to refresh a memory cell of the memory bank and a row hammer refresh (RHR) command associated with a second pump to refresh a second memory cell of the memory bank in conjunction with a refresh operation, wherein the bank control block when in operation transmits a first control signal to the command decoder to determine which automatic error check and scrub (AECS) mode operation is selected. 
 
     
     
       2. The memory device of  claim 1 , wherein the command decoder when in operation selects a first AECS mode of operation when the first control signal comprises a first binary value. 
     
     
       3. The memory device of  claim 2 , wherein the command decoder when in operation transmits a third pump in conjunction with the first AECS mode of operation to the bank control block at a time period in addition to a plurality of time periods utilized for the refresh operation to modify a refresh rate of the refresh operation. 
     
     
       4. The memory device of  claim 2 , wherein the command decoder when in operation selects a second AECS mode of operation when the first control signal comprises a second binary value. 
     
     
       5. The memory device of  claim 4 , wherein the bank control block when in operation transmits a second control signal to the command decoder indicative of whether a time period of a series of time periods associated with the refresh operation includes either of the first pump or the second pump. 
     
     
       6. The memory device of  claim 5 , wherein the command decoder when in operation transmits, in conjunction with the second AECS mode of operation, one or more AECS commands during the time period of the series of time periods in place of a REF command and an RHR command during the time period of the series of time periods when the second control signal indicates that neither the first pump nor the second pump is included in the time period. 
     
     
       7. The memory device of  claim 5 , wherein the command decoder when in operation transmits, in conjunction with the second AECS mode of operation, one or more AECS commands during the time period of the series of time periods in place of a REF command during the time period of the series of time periods when the second control signal indicates that the first pump is included in the time period. 
     
     
       8. The memory device of  claim 5 , wherein the command decoder when in operation transmits, in conjunction with the second AECS mode of operation, one or more AECS commands during the time period of the series of time periods in place of a RHR command during the time period of the series of time periods when the second control signal indicates that the second pump is not included in the time period. 
     
     
       9. A memory device, comprising:
 a command decoder that when in operation transmits a refresh (REF) command associated with a first pump to refresh a memory cell of the memory device and a row hammer refresh (RHR) command associated with a second pump to refresh a second memory cell of the memory device in conjunction with a refresh operation during a time period of a series of time periods associated with the refresh operation, wherein the command decoder when in operation executes an additional memory operation during a second time period of the series of time periods associated with the refresh operation without affecting a refresh rate of the refresh operation. 
 
     
     
       10. The memory device of  claim 9 , wherein the command decoder when in operation executes an automatic error check and scrub (AECS) mode operation as the additional memory operation. 
     
     
       11. The memory device of  claim 10 , wherein the command decoder when in operation executes the AECS mode operation by transmitting one or more AECS commands during the second time period of the series of time periods in place of a REF command and an RHR command of the refresh operation when no pumps are associated with the REF command and the RHR command. 
     
     
       12. The memory device of  claim 10 , wherein the command decoder when in operation executes the AECS mode operation by transmitting one or more AECS commands during the second time period of the series of time periods in place of a REF command of the refresh operation when no pumps are associated with the REF command. 
     
     
       13. The memory device of  claim 10 , wherein the command decoder when in operation executes the AECS mode operation by transmitting one or more AECS commands during the second time period of the series of time periods in place of a REF command of the refresh operation. 
     
     
       14. The memory device of  claim 10 , wherein the command decoder when in operation executes the AECS mode operation by transmitting one or more AECS commands during the second time period of the series of time periods in place of an RHR command of the refresh operation when no pumps are associated with the RHR command. 
     
     
       15. The memory device of  claim 9 , wherein the command decoder when in operation executes a refresh management (RFM) operation as the additional memory operation. 
     
     
       16. The memory device of  claim 15 , wherein the command decoder when in operation executes the RFM operation by transmitting a group of RHR pumps during the second time period of the series of time periods in place of a REF command and an RHR command of the refresh operation when no pumps are associated with the REF command and the RHR command. 
     
     
       17. The memory device of  claim 16 , wherein the command decoder when in operation executes the RFM operation by modifying a timing in which a group of RHR pumps are transmitted to the second time period of the series of time periods in place of a REF command and an RHR command of the refresh operation when no pumps are associated with the REF command and the RHR command. 
     
     
       18. A method, comprising:
 transmitting a refresh (REF) command associated with a first pump to refresh a memory cell and transmitting a row hammer refresh (RHR) command associated with a second pump to refresh a second memory cell in conjunction with a refresh operation during a time period of a series of time periods associated with the refresh operation; and 
 executing an additional memory operation during a second time period of the series of time periods associated with the refresh operation without affecting a refresh rate of the refresh operation. 
 
     
     
       19. The method of  claim 18 , wherein executing the additional memory operation comprises executing an automatic error check and scrub (AECS) mode operation. 
     
     
       20. The method of  claim 19 , wherein executing the additional memory operation comprises executing a refresh management (RFM) operation.