Serial data processing device and data offset calibration method

Abstract

A serial data processing device includes an offset detector circuit and an offset calibration circuit. The offset detector circuit is configured to store a plurality of tokens, and to receive a first data signal from a host device, and to detect an offset in the received first data signal according to the plurality of tokens, in order to generate a calibration signal, in which each of the tokens includes at least one predetermined logic value, and numbers of the at least one predetermined logic value in each of the plurality of tokens are different. The offset calibration circuit is configured to calibrate the received first data signal according to the calibration signal, in order to generate a second data signal.

What is claimed is: 
     
       1. A serial data processing device, comprising:
 an offset detector circuit configured to store a plurality of tokens, and to receive a first data signal from a host device, and to detect an offset in the received first data signal according to the plurality of tokens, in order to generate a calibration signal, wherein each of the tokens comprises at least one predetermined logic value, and numbers of the at least one predetermined logic value in each of the plurality of tokens are different; 
 an offset calibration circuit configured to calibrate the received first data signal according to the calibration signal, in order to generate a second data signal; and 
 a transmitter circuit configured to transmit a third data signal to the host device, 
 wherein the offset detector circuit is further configured to output a control signal to the transmitter circuit when the offset is determined to be a right offset, in order to increase a driving ability of the transmitter circuit. 
 
     
     
       2. The serial data processing device of  claim 1 , wherein the offset detector circuit is configured to compare the first data signal with a first token in the plurality of tokens, in order to detect the offset in the received first data signal. 
     
     
       3. The serial data processing device of  claim 2 , wherein the first data signal comprises front data, the offset detector circuit is configured to select the first token from the plurality of tokens according to a number of the at least one predetermined logic value in the front data, and a number of the at least one predetermined logic value in the first token is the same as the number of the at least one predetermined logic value in the front data. 
     
     
       4. The serial data processing device of  claim 2 , wherein the offset detector circuit is configured to determine whether the offset is a left offset or the right offset according to a bit location of the at least predetermined logic value in the first token and a bit location of the at least one predetermined logic value in the received first data signal, in order to generate the calibration signal. 
     
     
       5. The serial data processing device of  claim 2 , wherein each of the plurality of tokens corresponds to a predetermined command, the offset detector circuit is configured to output a first command signal according to the predetermined command corresponding to the first token, and the offset calibration circuit is further configured to calibrate the first command signal according to the calibration signal, in order to generate a second command signal, wherein the second command signal is to notify a processing circuit to perform at least one operation corresponding to the predetermined command. 
     
     
       6. The serial data processing device of  claim 1 , further comprising:
 a serial-to-parallel circuit configured to generate a plurality of fourth data signals according to the received first data signal, wherein the offset calibration circuit is configured to calibrate the plurality of fourth data signals according to the calibration signal, in order to generate the second data signal. 
 
     
     
       7. The serial data processing device of  claim 1 , further comprising:
 a serial-to-parallel circuit configured to generate a plurality of fourth data signals according to the second data signal. 
 
     
     
       8. A data offset calibration method, comprising:
 receiving a first data signal from a host device; 
 detecting an offset in the received first data signal according to a plurality of tokens, in order to generate a calibration signal, wherein each of the plurality of tokens comprises at least one predetermined logic value, and numbers of the at least one predetermined logic value in each of the plurality of tokens are different; 
 calibrating the received first data signal according to the calibration signal, in order to generate a second data signal; and 
 increasing a driving ability of a transmitter circuit when the offset is determined to be a right offset, wherein the transmitter circuit is configured to transmit a third data signal to the host device. 
 
     
     
       9. The data offset calibration method of  claim 8 , wherein detecting the offset in the received first data signal according to the plurality of tokens to generate the calibration signal comprises:
 selecting a first token from the plurality of tokens according to the received first data signal; and 
 determining whether the offset is a left offset or the right offset according to a bit location of the at least predetermined logic value in the first token and a bit location of the at least one predetermined logic value in the received first data signal, in order to generate the calibration signal. 
 
     
     
       10. The data offset calibration method of  claim 9 , wherein each of the plurality of tokens corresponds to a predetermined command, and the data offset calibration method further comprises:
 outputting a first command signal according to the predetermined command corresponding to the first token; and 
 calibrating the first command signal according to the calibration signal, in order to generate a second command signal, wherein the second command signal is to notify a processing circuit to perform at least one operation corresponding to the predetermined command.