Signal analysis method and signal analysis module

Abstract

A signal analysis method is described. The signal analysis method includes: receiving a time-and-value discrete input signal, the input signal being associated with a signal source; determining at least one jitter component of the input signal; determining a step response based on the input signal, the step response being associated with at least the signal source; determining a counter function based on the step response, the counter function being configured to cancel error terms in a finite-time transform of the step response to frequency domain; superposing the step response and the counter function, thereby obtaining a modified step response; and transforming the modified step response to frequency domain, thereby obtaining a transfer function being associated with at least the signal source. Further, a signal analysis module for analyzing a time-and-value discrete input signal being associated with a signal source is described.

The invention claimed is: 
     
       1. A signal analysis method, said signal analysis method comprising:
 receiving a time-and-value discrete input signal, said input signal being associated with a signal source; 
 determining at least one jitter component of said input signal; 
 determining a step response based on said input signal, said step response being associated with at least said signal source; 
 determining a counter function based on said step response, said counter function being configured to cancel error terms in a finite-time transform of said step response to frequency domain; 
 superposing said step response and said counter function, thereby obtaining a modified step response; and 
 transforming said modified step response to frequency domain, thereby obtaining a transfer function being associated with at least said signal source, 
 wherein the step response and the transfer function are determined without using a dedicated test signal. 
 
     
     
       2. The signal analysis method of  claim 1 , wherein said counter function is determined based on an asymptotic value of said step response. 
     
     
       3. The signal analysis method of  claim 1 , wherein said step response has a predetermined sample length, and wherein said counter function is determined based on said sample length. 
     
     
       4. The signal analysis method of  claim 3 , wherein said modified step response is transformed over said sample length. 
     
     
       5. The signal analysis method of  claim 1 , wherein said counter function is established as a ramp function. 
     
     
       6. The signal analysis method of  claim 1 , wherein said modified step response is transformed by a time discrete Fourier transform. 
     
     
       7. The signal analysis method of  claim 1 , wherein at least one of a magnitude of said transfer function and a phase of said transfer function is determined. 
     
     
       8. The signal analysis method of  claim 1 , wherein at least one of a periodic jitter component of said input signal and a data dependent jitter component of said input signal is determined. 
     
     
       9. The signal analysis method of  claim 1 , wherein said at least one jitter component and said step response are determined jointly. 
     
     
       10. The signal analysis method of  claim 1 , wherein said at least one determined jitter component and said transfer function are plotted on a display. 
     
     
       11. The signal analysis method of  claim 1 , wherein said input signal is PAM-N coded. 
     
     
       12. A signal analysis module for analyzing a time-and-value discrete input signal being associated with a signal source, comprising:
 one or more circuits configured to:
 receive said input signal; 
 determine at least one jitter component of said input signal; 
 determine a step response based on said input signal, said step response being associated with at least said signal source; 
 determine a counter function based on said step response, said counter function being configured to cancel error terms in a finite-time transform of said step response to frequency domain; 
 superpose said step response and said counter function, thereby obtaining a modified step response; and 
 transform said modified step response to frequency domain, thereby obtaining a transfer function being associated with at least said signal source. 
 
 
     
     
       13. The signal analysis module of  claim 12 , wherein said one or more circuits is configured to determine said counter function based on an asymptotic value of said step response. 
     
     
       14. The signal analysis module of  claim 12 , wherein said step response has a predetermined sample length, and wherein said one or more circuits is configured to determine said counter function based on said sample length. 
     
     
       15. The signal analysis module of  claim 14 , wherein said one or more circuits is configured to transform said modified step response over said sample length. 
     
     
       16. The signal analysis module of  claim 14 , wherein said one or more circuits is configured to evaluate said transfer function only at predefined frequencies being associated with an inverse of said sample length. 
     
     
       17. The signal analysis module of  claim 12 , wherein said counter function is established as a ramp function. 
     
     
       18. The signal analysis module of  claim 12 , wherein said one or more circuits is configured to determine at least one of a magnitude of said transfer function and a phase of said transfer function. 
     
     
       19. The signal analysis module of  claim 12 , wherein said one or more circuits is configured to determine said at least one jitter component and said step response jointly. 
     
     
       20. A non-transitory computer-readable media containing computer readable instructions stored thereon that, when executed by one or more computer circuits, cause the one or more computer circuits to perform steps of  claim 1 .