Solid-state imaging device and electronic apparatus

Abstract

A solid-state imaging device is disclosed. In one example, a solid-state imaging device includes a current mirror circuit connected to first and second vertical signal lines, first and second unit pixels connected to the first or the second vertical signal line, a current supply line connected to the first and the second unit pixels, and a constant current circuit connected to the current supply line. The unit pixels each include a photoelectric conversion element, a transfer transistor that transfers an electric charge generated in the photoelectric conversion element, first and second charge accumulation units that accumulate the transferred electric charge, a switching transistor configured to control accumulation of the electric charge by the second charge accumulation unit, and an amplification transistor that causes a voltage corresponding to electric charges accumulated the first and/or the second charge accumulation units to appear in the first or the second vertical signal line.

The invention claimed is: 
     
       1. A solid-state imaging device comprising:
 a first vertical signal line and a second vertical signal line; 
 a current mirror circuit connected to the first and the second vertical signal lines; 
 a first unit pixel connected to the first vertical signal line; 
 a second unit pixel connected to the second vertical signal line; 
 a current supply line connected to the first and the second unit pixels; and 
 a constant current circuit connected to the current supply line, wherein 
 each of the first and the second unit pixels comprises:
 a photoelectric conversion element configured to photoelectrically convert incident light; 
 a transfer transistor configured to transfer an electric charge generated in the photoelectric conversion element; 
 first and second charge accumulation units configured to accumulate the electric charge transferred by the transfer transistor; 
 a switching transistor configured to control accumulation of the electric charge by the second charge accumulation unit; and 
 an amplification transistor configured to cause a voltage corresponding to electric charges accumulated in the first charge accumulation unit, or the first and the second charge accumulation units, so appear in the first or the second vertical signal line, 
 
 a drain of the amplification transistor of the first unit pixel is connected to the first vertical signal line, 
 a drain of the amplification transistor of the second unit pixel is connected to the second vertical signal line, and 
 a source of the amplification transistor of the first unit pixel and a source of the amplification transistor of the second unit pixel are connected to the current supply line. 
 
     
     
       2. The solid-state imaging device according to  claim 1 , further comprising:
 a reset transistor configured to discharge the electric charges accumulated in the first and the second charge accumulation units. 
 
     
     
       3. The solid-state imaging device according to  claim 1 , wherein each of the first and the second unit pixels further comprises a selection transistor connected between the drain of the amplification transistor and the first or the second vertical signal line. 
     
     
       4. The solid-state imaging device according to  claim 1 , wherein
 the first charge accumulation unit includes a first capacitance component disposed at a first node connecting a drain of the transfer transistor with a gate of the amplification transistor, and a second capacitance component between the first node and a second node on the drain side of the amplification transistor, and 
 the second charge accumulation unit includes a third capacitance component disposed at a third node on the drain side of the transfer transistor, and a fourth capacitance component between the third node and a fourth node on the drain side of the amplification transistor. 
 
     
     
       5. The solid-state imaging device according to  claim 4 , wherein at least one of the first to the fourth capacitance components is a capacitance component that is added by using a capacitive element or a metal layer. 
     
     
       6. The solid-state imaging device according to  claim 1 , wherein
 a source of the transfer transistor is connected to the photoelectric conversion element, 
 a drain of the transfer transistor is connected to a gate of the amplification transistor and a source of the switching transistor, 
 the first charge accumulation unit is disposed at a node connecting the drain of the transfer transistor with the gate of the amplification transistor, and 
 the second charge accumulation unit is disposed at a node connecting the drain of the transfer transistor with the source of the switching transistor. 
 
     
     
       7. The solid-state imaging device according to  claim 1 , wherein
 each of the first and the second unit pixels further comprises:
 wiring configured to connect a drain of the transfer transistor with the first or the second vertical signal line; and 
 a capacitive element disposed on the wiring, 
 
 a source of the transfer transistor is connected to the photoelectric conversion element, 
 the drain of the transfer transistor is connected to a gate of the amplification transistor, and 
 the switching transistor is disposed on the wiring. 
 
     
     
       8. The solid-state imaging device according to  claim 7 , wherein the capacitive element is disposed between the drain of the transfer transistor and a source of the switching transistor. 
     
     
       9. The solid-state imaging device according to  claim 7 , wherein the capacitive element is disposed between a drain of the switching transistor and the first or the second vertical signal line. 
     
     
       10. The solid-state imaging device according to  claim 1 , wherein
 a source of the transfer transistor is connected to the photoelectric conversion element, 
 a drain of the transfer transistor is connected to a gate of the amplification transistor and a drain of the switching transistor, 
 the first charge accumulation unit is disposed at a node connecting the drain of the transfer transistor with the gate of the amplification transistor, and 
 the second charge accumulation unit is disposed between a source of the switching transistor and grounding. 
 
     
     
       11. The solid-state imaging device according to  claim 1 , wherein a gate of the amplification transistor of each of the first and the second unit pixels is connected to a drain of a transfer transistor that is disposed in another unit pixel. 
     
     
       12. The solid-state imaging device according to  claim 1 , comprising:
 a first switch configured to switch connection between the first vertical signal line and the current mirror circuit; 
 a second switch configured to switch connection between the second vertical signal line and the current mirror circuit; 
 a third switch configured to switch connection between the current supply line and the constant current circuit; 
 a fourth switch configured to switch connection between the first vertical signal line and the constant current circuit; 
 a fifth switch configured to switch connection between the second vertical signal line and the constant current circuit; and 
 a sixth switch configured to switch connection between the current supply line and a power supply voltage. 
 
     
     
       13. The solid-state imaging device according to  claim 12 , wherein
 the first to the third switches are caused to be in an ON state during a period of a differential read-out mode, and caused to be in an OFF state during a period of a source follower read-out mode, and 
 the fourth to the sixth switches are caused to be in an OFF state during the period of the differential read-out mode, and caused to be in an ON state during the period of the source follower read-out mode. 
 
     
     
       14. The solid-state imaging device according to  claim 1 , comprising:
 a first switch configured to switch connection between the first vertical signal line and the current mirror circuit; 
 a second switch configured to switch connection between the current supply line and the constant current circuit; 
 a third switch configured to switch connection between the first vertical signal line and the constant current circuit; and 
 a fourth switch configured to switch connection between the current supply line and a power supply voltage. 
 
     
     
       15. The solid-state imaging device according to  claim 14 , wherein
 the first and the second switches are caused to be in an ON state during a period of a differential read-out mode, and caused to be in an OFF state during a period of a source follower read-out mode, and 
 the third and the fourth switches are caused to be in an OFF state during the period of the differential read-out mode, and caused to be in an ON state during the period of the source follower read-out mode. 
 
     
     
       16. The solid-state imaging device according to  claim 1 , comprising:
 a plurality of unit pixels including the first and the second unit pixels, wherein 
 the unit pixels are two-dimensionally arranged in a matrix, and 
 the first unit pixel and the second unit pixel are arranged in a same column. 
 
     
     
       17. The solid-state imaging device according to  claim 16 , wherein the second unit pixel is adjacent to the first unit pixel in the same column. 
     
     
       18. The solid-state imaging device according to  claim 16 , wherein the second unit pixel is a fixed unit pixel in the same column. 
     
     
       19. The solid-state imaging device according to  claim 1 , further comprising:
 a read-out circuit that is connected to the first and the second vertical signal lines, and configured to read out an analog pixel signal from the first or the second unit pixel into the first or the second vertical signal line; and 
 a signal processing unit configured to convert, into a digital value, the analog pixel signal that is read out into the first and the second vertical signal lines by the read-out circuit. 
 
     
     
       20. An electronic apparatus comprising:
 a solid-state imaging device, wherein 
 the solid-state imaging device comprises:
 a first vertical signal line and a second vertical signal line; 
 a current mirror circuit connected to the first and the second vertical signal lines; 
 a first unit pixel connected to the first vertical signal line; 
 a second unit pixel connected to the second vertical signal line; 
 a current supply line connected to the first and the second unit pixels; and 
 a constant current circuit connected to the current supply line, 
 
 each of the first and the second unit pixels comprises:
 a photoelectric conversion element configured to photoelectrically convert incident light; 
 a transfer transistor configured to transfer an electric charge generated in the photoelectric conversion element; 
 first and second charge accumulation units configured to accumulate the electric charge transferred by the transfer transistor; 
 a switching transistor configured to control accumulation of the electric charge by the second charge accumulation unit; and 
 an amplification transistor configured to cause a voltage corresponding to electric charges accumulated in the first charge accumulation unit, or the first and the second charge accumulation units, to appear in the first or the second vertical signal line, 
 
 a drain of the amplification transistor of the first unit pixel is connected to the first vertical signal line, 
 a drain of the amplification transistor of the second unit pixel is connected to the second vertical signal line, and 
 a source of the amplification transistor of the first unit pixel and a source of the amplification transistor of the second unit pixel are connected to the current supply line.