US11456389B2ActiveUtilityA1
Deep trench surrounded MOSFET with planar MOS gate
Assignee: CHAMPION MICROELECTRONIC CORPPriority: Dec 24, 2016Filed: Jul 26, 2020Granted: Sep 27, 2022
Est. expiryDec 24, 2036(~10.5 yrs left)· nominal 20-yr term from priority
H10D 30/66H01L 29/70H01L 29/0692H01L 29/7806H01L 29/8725H01L 29/7813H10D 84/146H10D 62/126H10D 48/34H10D 30/668H10D 8/60H10D 30/665H10D 64/519H10D 64/117H10D 62/127H10D 8/605
61
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Claims
Abstract
Apparatus and other embodiments associated with high speed and high breakdown voltage MOS rectifier are disclosed. A Junction All Around structure, where a deep trench structure surrounds and encloses a P-N junction or a MOS structure, is created and applied in various rectifiers. In one embodiment, multiple deep trenches in concentric ring circles enclosed several horizontal P-N junctions in concentric ring circles. In another embodiment, an enclosed deep trench in ring circle surrounds a horizontal P-N junction, which results in a planar N-channel MOS during forward bias. This structure can be extended to multiple deep trenches with associated horizontal P-N junctions.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A MOSFET, comprising:
a first n-type semiconductor layer;
a second n-type epitaxial semiconductor layer with lower doping concentration but larger depth than that of the first n-type semiconductor layer, deposed on top of the first n-type semiconductor layer;
a p-type semiconductor layer deposed on the top surface of the second n-type semiconductor layer;
a metal layer deposed above the p-type semiconductor layer;
at least two enclosed operating deep trenches in concentric continuous ring circles
comprising a first deep trench and a second deep trench, wherein
the first operating deep trench etched from the top of the p-type semiconductor layer down to the interface of the first n-type semiconductor layer and the second n-type semiconductor layer;
the second operating deep trench etched from the top of the p-type semiconductor layer down to the interface of the first n-type semiconductor layer and the second n-type semiconductor layer, and the first operating deep trench has smaller radius than the second operating deep trench;
a first set of two third n-type semiconductor in continuous ring circles deposed in the upper part of the p-type semiconductor layer and being adjacent to both inner-side and outer-side of the first enclosed deep trench but not in direct contact with the first enclosed deep trench; and
a second set of two third n-type semiconductor in continuous ring circles deposed in the upper part of the p-type semiconductor layer and being adjacent to both inner-side and outer-side of the second enclosed deep trench but not in direct contact with the second enclosed deep trench.
2. The MOSFET device of claim 1 , wherein the at least two enclosed operating deep trenches have oxide coating on their sidewalls and bottom surfaces, and a polysilicon layer filling their centers and connected to the metal layer for operation to form a MOS-Sidewall-Plate structure.
3. The MOSFET device of claim 1 , wherein the first-set outer-side third n-type semiconductor ring circle, which has smaller radius than that of the second-set inner-side third n-type semiconductor ring circle, is spaced apart from the second-set inner-side third n-type semiconductor ring circle, such that leaving the p-type semiconductor in between.
4. The MOSFET device of claim 1 , further comprising a third enclosed operating deep trench in concentric continuous ring etched from the top of the p-type semiconductor layer down to the interface of the first n-type semiconductor layer and the second-type semiconductor layer, wherein the third operating deep trench is between the first operating deep trench and second operating deep trench with substantially the same distance to both the first operating deep trench and second operating deep trench.
5. The MOSFET device of claim 1 , further comprising an enclosed non-operating deep trench in concentric ring circle filled with only oxide and located as the outermost ring circle of the device.
6. The MOSFET device of claim 4 , further comprising a third set of two third n-type semiconductor in continuous ring circles deposed in the upper part of the p-type semiconductor layer and being adjacent to both inner-side and outer-side of the third enclosed deep trench but not in direct contact with the third enclosed deep trench.
7. The MOSFET device of claim 5 , wherein the enclosed non-operating deep trench in concentric ring circle is the outermost deep trench of the MOSFET device.
8. The MOSFET device of claim 7 , wherein all deep trenches except the outermost deep trench are operating trenches having MOS-Sidewall-Plate structure and in concentric continuous ring circles.
9. The MOSFET device of claim 1 , wherein the first and second operating deep trenches extend into the first n-type semiconductor layer.
10. The MOSFET device of claim 1 , further comprising a planar electrode deposed above the metal layer and between the first and the second enclosed deep trenches.Cited by (0)
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