P
US11467211B2ActiveUtilityPatentIndex 37

Error detection on integrated circuit input/output pins

Assignee: SIGNIFY HOLDING BVPriority: Jun 1, 2016Filed: May 23, 2017Granted: Oct 11, 2022
Est. expiryJun 1, 2036(~9.9 yrs left)· nominal 20-yr term from priority
Inventors:FANG YUHONGCIOLEK MARKGUDIPATI HARSHITHAGRUEV GEORGE
H05B 45/50G01R 31/64G01R 31/3004G01R 31/31905G01R 31/31926H05B 47/20H05B 45/00G01R 31/2884H05B 41/2851
37
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Cited by
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References
14
Claims

Abstract

A method for detecting error on an input/output (IO) pin of an integrated circuit includes using the input/output pin of the integrated circuit in a first mode by receiving or sending a first value as analog data or digital data. The input/output pin is toggled in a test mode after each instance of using the input/output pin in the first mode. The test mode includes providing a second value disparate from the first value during a set time after using the input/output pin in the first mode, receiving back during the set time a resulting value based on providing the second value, measuring the resulting value, and identifying an error on the input/output pin of the integrated circuit based on the measured resulting value.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
       1. A method for detecting error on an input/output pin of an integrated circuit by a microprocessor of said integrated circuit, the input/output pin of the integrated circuit being linked to an input node, wherein the input node receives in input mode an input signal, including a first value, through at least one resistor and wherein the input node is connected to a reference voltage through a second resistor and to zero volt through a third resistor, the method comprising:
 using the input/output pin of the integrated circuit in input mode by receiving the first value; 
 toggling the input/output pin in a test mode after each of a plurality of instances of using the input/output pin in the input mode, 
 wherein the test mode comprises using the input/output pin as an output providing a second value, different from the first value, during a set time after using the input/output pin in the input mode, receiving back on the input/output pin, during the set time a resulting value based on providing the second value and using the first, second and third resistors, measuring the resulting value, and identifying an error on the input/output pin of the integrated circuit based on the measured resulting value by comparing the resulting value and the second value; and 
 wherein the identified error indicates that the input/output pin of the integrated circuit is stuck in a high/low level or if the first value includes a multiplexer addressing error. 
 
     
     
       2. The method of  claim 1 , further comprising:
 outputting a pulse to provide the second value as an output pulse value at an output of the integrated circuit in the test mode; 
 reading the output pulse internally to receive back on the input/output pin the resulting value by obtaining the output pulse value; 
 measuring the output pulse value as the measured resulting value; and 
 comparing the output pulse value read from the output with the second value, 
 wherein the identified error is identified based on the comparing. 
 
     
     
       3. The method of  claim 1 ,
 wherein the using the input/output pin in the first mode comprises reading the first value from a first received analog input from the input/output pin after conversion by an analog to digital converter; 
 wherein the toggling in the test mode comprises reconfiguring the input/output pin first for digital output in the test mode after receiving the first received analog input; and 
 wherein the providing comprises setting the second value as a digital output value level for output from the input/output pin reconfigured for digital output in the test mode during the set time; 
 wherein the method further comprises:
 charging or discharging a capacitor at the input/output pin reconfigured for digital output in the test mode to maintain a voltage level after setting the second value as the digital output value during the set time; 
 reconfiguring the input/output pin second for analog input again in the test mode after setting the second value as the digital output value during the set time; 
 measuring the voltage level at the input/output pin/voltage level of the capacitor to obtain the measured resulting value after conversion by the analog to digital converter, and 
 comparing the measured resulting value/voltage level obtained from the input/output pin with the second value/digital output value level, 
 wherein the identified error is identified based on the comparing. 
 
 
     
     
       4. The method of  claim 1 , wherein the integrated circuit comprises a microcontroller, used to control a light emitting diode driving circuit. 
     
     
       5. The method of  claim 4 ,
 wherein the light emitting diode driving circuit complies with class 2 requirements for light emitting diodes, and 
 wherein the microcontroller complies with an Underwriter Laboratories 60730 standard. 
 
     
     
       6. The method of  claim 3 ,
 wherein the identified error indicates that first received analog input for the input/output pin has a multiplexer addressing error. 
 
     
     
       7. The method of  claim 6 , further comprising:
 converting the first received analog input and the measured resulting value/voltage level to digital output using the analog to digital converter; and 
 setting the input/output pin reconfigured first for digital output to a HIGH level or a LOW level, 
 wherein the capacitor is connected to the input/output pin reconfigured for digital output to maintain the voltage level during the set time. 
 
     
     
       8. The method of  claim 7 , further comprising:
 determining whether the measured resulting value/voltage level at the input/output pin indicates that the input/output pin is set to the HIGH level or the LOW level, and 
 identifying an analog input multiplexer addressing error based on the determination and the comparing. 
 
     
     
       9. A control circuit comprising:
 an integrated circuit including a microprocessor operable to execute instructions to detect errors on an input/output pin of the integrated circuit, the input/output pin of the integrated being linked to an input node, 
 a first resistor connected to the input node and receiving an input signal, including a first value, in an input mode, 
 a second resistor connected between a reference voltage and the input node 
 a third resistor connected between a zero voltage and the input node,
 wherein, when executed by the microprocessor, the instructions cause a light emitting diode driving circuit to perform a process comprising:
 using the input/output pin of the integrated circuit in the input mode by receiving a first value; 
 toggling the input/output pin in a test mode after each of a plurality of instances of using the input/output pin in the first mode, 
 
 wherein the test mode comprises using the input/output pin at an output providing a second value, different from the first value, during a set time after using the input/output pin in the input mode, receiving back on the input/output pin, during the set time a resulting value based on providing the second value and using the first, second and third resistors, measuring the resulting value, measuring the resulting value, and identifying an error on the input/output pin of the microprocessor based on the measured resulting value by comparing the resulting value and the second value; and 
 wherein the identified error indicates that the input/output pin of the integrated circuit is stuck in a high/low level or if the first value includes a multiplexer addressing error. 
 
 
     
     
       10. The control circuit of  claim 9 ,
 wherein the input mode is a mode in which the integrated circuit is primarily used. 
 
     
     
       11. The control circuit of  claim 9 ,
 wherein the input/output pin is configured for analog input in the first mode, and 
 wherein the toggling comprises reconfiguring the input/output pin from being configured for analog input to being configured for digital output. 
 
     
     
       12. The control circuit of  claim 9 , wherein the control circuit further comprises a fourth resistor linking the input/output pin of the integrated circuit to the input node. 
     
     
       13. The control circuit of  claim 9 , wherein the control circuit further comprises a capacitor connected in parallel with the third resistor. 
     
     
       14. The control circuit of  claim 9 , wherein said control circuit is in an output section of the light emitting diode driving circuit having a primary control section and the output section isolated from the primary control section.

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