Crystal oscillator, chip, and electronic device

Abstract

Disclosed are a crystal oscillator, a chip, and an electronic device. The crystal oscillator includes: an oscillating circuit, including: a crystal, an amplification circuit, a first load capacitor, and a second load capacitor, where the first load capacitor and the second load capacitor are respectively connected to a first terminal and a second terminal of the crystal; and a first Miller multiplication circuit, where an input terminal and an output terminal of the first Miller multiplication circuit are respectively connected to two terminals of the first load capacitor, and the first Miller multiplication circuit is configured to increase a first load capacitance of the oscillating circuit, where the first load capacitance is a capacitance between the first terminal of the crystal and the ground. According to this technical solution, an area occupied by the load capacitor as well as circuit costs can be reduced.

What is claimed is: 
     
       1. A crystal oscillator, comprising:
 an oscillating circuit, comprising: a crystal, an amplification circuit, a first load capacitor, and a second load capacitor, wherein two terminals of the crystal are respectively connected to an input terminal and an output terminal of the amplification circuit, and the first load capacitor and the second load capacitor are respectively connected to a first terminal and a second terminal of the crystal; and 
 a first Miller multiplication circuit, wherein an input terminal and an output terminal of the first Miller multiplication circuit are respectively connected to two terminals of the first load capacitor, and the first Miller multiplication circuit is configured to increase a first load capacitance of the oscillating circuit, wherein the first load capacitance is a capacitance between the first terminal of the crystal and the ground; 
 a first switch group configured to connect the first Miller multiplication circuit and the first load capacitor when the crystal oscillator starts oscillation, and to disconnect the first Miller multiplication circuit and the first load capacitor when the crystal oscillator maintains oscillation. 
 
     
     
       2. The crystal oscillator according to  claim 1 , wherein the first Miller multiplication circuit is configured to increase the first load capacitance to A+1 times a capacitance of the first load capacitor, and A is a gain of the first Miller multiplication circuit. 
     
     
       3. The crystal oscillator according to  claim 2 , wherein the first Miller multiplication circuit comprises: a first multiplication transistor and a second multiplication transistor, wherein the first multiplication transistor and the second multiplication transistor are connected in series to form an inverting amplification circuit;
 a gate and a drain of the first multiplication transistor are connected to each other, a source of the first multiplication transistor is connected to a power supply voltage, and the drain of the first multiplication transistor is connected to a drain of the second multiplication transistor; and 
 a gate of the second multiplication transistor is the input terminal of the first Miller multiplication circuit and is connected to one terminal of the first load capacitor, the drain of the second multiplication transistor is the output terminal of the first Miller multiplication circuit and is connected to the other terminal of the first load capacitor, and a source of the second multiplication transistor is connected to the ground. 
 
     
     
       4. The crystal oscillator according to  claim 3 , wherein the first Miller multiplication circuit further comprises:
 at least one first regulating transistor, wherein a source and a drain of each first regulating transistor in the at least one first regulating transistor are respectively connected to the source and the drain of the first multiplication transistor, and a gate of each first regulating transistor in the at least one first regulating transistor is connected to a gate control voltage. 
 
     
     
       5. The crystal oscillator according to  claim 4 , wherein the first Miller multiplication circuit further comprises:
 at least one first regulating switch, wherein the at least one first regulating switch is connected to the at least one first regulating transistor in a one-to-one correspondence, and the first regulating switch is configured to control whether to connect the first regulating transistor to the first multiplication transistor; and 
 the at least one first regulating switch is configured to adjust a transconductance of the first multiplication transistor, so as to adjust a gain A of the first Miller multiplication circuit. 
 
     
     
       6. The crystal oscillator according to  claim 4 , wherein if the at least one first regulating transistor is a plurality of first regulating transistors, the plurality of first regulating transistors are transistors having the same structure. 
     
     
       7. The crystal oscillator according to  claim 3 , wherein the first Miller multiplication circuit further comprises:
 at least one second regulating transistor, wherein a gate, a source, and a drain of each second regulating transistor in the at least one second regulating transistor are respectively connected to the gate, the source, and the drain of the second multiplication transistor. 
 
     
     
       8. The crystal oscillator according to  claim 7 , wherein the first Miller multiplication circuit further comprises:
 at least one second regulating switch, wherein the at least one second regulating switch is connected to the at least one second regulating transistor in a one-to-one correspondence, and the second regulating switch is configured to control whether to connect the second regulating transistor to the second multiplication transistor; and 
 the at least one second regulating switch is configured to adjust a transconductance of the second multiplication transistor, so as to adjust the gain A of the first Miller multiplication circuit. 
 
     
     
       9. The crystal oscillator according to  claim 7 , wherein if the at least one second regulating transistor is a plurality of second regulating transistors, the plurality of second regulating transistors are transistors having the same structure. 
     
     
       10. The crystal oscillator according to  claim 9 , wherein a structure of the at least one second regulating transistor is the same as a structure of the second multiplication transistor. 
     
     
       11. The crystal oscillator according to  claim 3 , wherein the amplification circuit comprises a first oscillating transistor, a second oscillating transistor, and a feedback resistor, wherein
 a gate of the first oscillating transistor is connected to a gate control voltage, a drain of the first oscillating transistor is connected to the second terminal of the crystal, and a source of the first oscillating transistor is connected to the power supply voltage; 
 a gate of the second oscillating transistor is connected to the first terminal of the crystal, a drain of the second oscillating transistor is connected to the second terminal of the crystal, and a source of the second oscillating transistor is connected to the ground; and 
 two terminals of the feedback resistor are respectively connected to the two terminals of the crystal. 
 
     
     
       12. The crystal oscillator according to  claim 11 , wherein a ratio of a width-to-length ratio of the second multiplication transistor to a width-to-length ratio of the second oscillating transistor is used to adjust the transconductance of the second multiplication transistor and the transconductance of the first multiplication transistor, so as to adjust the gain A of the first Miller multiplication circuit. 
     
     
       13. The crystal oscillator according to  claim 11 , wherein a ratio of a width-to-length ratio of the second regulating transistor to a width-to-length ratio of the first oscillating transistor is used to adjust the transconductance of the first multiplication transistor, so as to adjust the gain A of the first Miller multiplication circuit. 
     
     
       14. The crystal oscillator according to  claim 1 , wherein the first switch group comprises: a first switch, a second switch, and a third switch, wherein
 the first switch is connected to the gate of the second multiplication transistor and one terminal of the first load capacitor, the second switch is connected to the drain of the first multiplication transistor and the other terminal of the first load capacitor, and the third switch is connected to the gate of the second multiplication transistor and the power supply voltage; 
 when the crystal oscillator starts oscillation, the first switch and the second switch are closed, the third switch is opened, and the first Miller multiplication circuit is connected to the first load capacitor to increase the first load capacitance of the oscillating circuit; and 
 when the crystal oscillator maintains oscillation, the third switch is closed, the first switch and the second switch are opened, and the first load capacitance of the oscillating circuit is equal to the capacitance of the first load capacitor. 
 
     
     
       15. The crystal oscillator according to  claim 1 , further comprising: a second Miller multiplication circuit, wherein an input terminal and an output terminal of the second Miller multiplication circuit are respectively connected to two terminals of the first load capacitor, and the second Miller multiplication circuit is configured to increase a second load capacitance of the oscillating circuit, wherein the second load capacitance is a capacitance between the second terminal of the crystal and the ground. 
     
     
       16. The crystal oscillator according to  claim 1 , wherein a circuit structure of the second Miller multiplication circuit is the same as a circuit structure of the first Miller multiplication circuit. 
     
     
       17. A chip, comprising:
 the crystal oscillator according to  claim 1 . 
 
     
     
       18. The chip according to  claim 17 , wherein the chip is a clock chip, and the clock chip is configured to provide a clock signal. 
     
     
       19. An electronic device, comprising:
 the chip according to  claim 18 .