System on a chip that drives display when CPUs are powered down

Abstract

In an embodiment, a system may include one or more processors forming central processing units (CPUs) in the system, a display controller configured to display frames on a display device, a memory controller configured to control a memory, and a power management circuit. The power management circuit may be configured to establish one of a plurality of power states in the system. In a first power state, the display controller and the memory controller are powered on while the CPUs are powered off. The display controller may be configured to read a plurality of prerendered frames from the memory and display the plurality of prerendered frames at times specified for each of the plurality of prerendered frames.

What is claimed is: 
     
       1. A system comprising:
 one or more processors forming central processing units (CPUs) for the system; 
 a display controller configured to read frames from a memory and process the frames for display on a display device; 
 a memory controller configured to interface to memory on behalf of the one or more processors and the display controller; 
 a plurality of components; 
 an interconnect coupled to the one or more processors, the display controller, the plurality of components, and the memory controller; 
 a power management circuit coupled to the one or more processors, the display controller, the memory controller, and the interconnect, wherein the power management circuit is configured to establish one of a plurality of power states in the system, and wherein, in a first power state of the plurality of power states the display controller, the memory controller, and at least a portion of the interconnect between the memory controller and the display controller are powered up while the one or more processors and the plurality of components are powered down, and wherein, in the first power state:
 the display controller is configured to display a plurality of prerendered frames on the display device, wherein the plurality of prerendered frames are stored in the memory controlled by the memory controller, wherein the display controller is configured to read a given frame of the plurality of prerendered frames over the interconnect from the memory controller and to display the given frame; 
 
 a first component that is powered in a second power state of the plurality of power states, wherein the display controller is not powered in the second power state; and 
 an ambient light sensor coupled to the first component, wherein the first component is configured to read the ambient light sensor and, responsive to detecting a change in ambient light that is greater than a threshold, the first component is configured to cause a change to the first power state, and wherein the display controller is configured to modify a brightness of a displayed frame in response to the change in ambient light. 
 
     
     
       2. The system as recited in  claim 1  wherein the display controller is configured to display the plurality of prerendered frames according to time stamps associated with the plurality of prerendered frames. 
     
     
       3. The system as recited in  claim 2  further comprising a first component that remains powered when other portions of the system are powered down, wherein the first component comprises a timer, and wherein the display controller is configured to set the timer based on a time stamp of a next frame of the plurality of prerendered frames. 
     
     
       4. The system as recited in  claim 3  wherein the display controller is configured to power down responsive to completing display of the given frame and setting the timer. 
     
     
       5. The system as recited in  claim 1  wherein the display controller includes a second processor configured to execute instructions to read the given frame. 
     
     
       6. The system as recited in  claim 5  wherein the second processor is further configured to execute additional instructions to modify a next frame of the plurality of prerendered frames based on one or more dynamic content locations identified for the next frame. 
     
     
       7. The system as recited in  claim 1  wherein the given frame includes one or more active regions, and wherein the display controller is configured to deactivate portions of the display that are excluded from the one or more active regions. 
     
     
       8. The system as recited in  claim 7  wherein the display controller is configured to drive data to the display for portions of the display that are within the one or more active regions. 
     
     
       9. The system as recited in  claim 1  wherein the first component is powered in the plurality of power states except for a third power state is which the system is off. 
     
     
       10. The system as recited in  claim 1  wherein the display controller is configured to modify a brightness of the frame in response to the change in ambient light by increasing the brightness in response to an increase in ambient light. 
     
     
       11. The system as recited in  claim 1  wherein the display controller is configured to modify a brightness of the frame in response to the change in ambient light by decreasing the brightness in response to an decrease in ambient light. 
     
     
       12. An integrated circuit comprising:
 one or more processors forming central processing units (CPUs) for a system; 
 a display controller configured to read frames from a memory and process the frames for display on a display device; 
 a memory controller configured to interface to memory on behalf of the one or more processors and the display controller; and 
 a power management circuit coupled to the one or more processors, the display controller, and the memory controller, wherein the power management circuit is configured to establish one of a plurality of power states in the integrated circuit, and wherein, in a first power state of the plurality of power states in the system the display controller and the memory controller are powered up while the one or more processors are powered down, and wherein, in the first power state the display controller is configured to read a given frame of a plurality of prerendered frames from the memory and to display the given frame, wherein the power management circuit is configured to transition the integrated circuit to a second power state of the plurality of power states in which the display controller is powered off between displaying respective ones of the plurality of prerendered frames, and wherein the display controller is configured to modify a next frame of the plurality of prerendered frames with dynamic content identified for the plurality of prerendered frames subsequent to displaying the given frame and prior to powering down, wherein the next frame is to be displayed at a next transition to the first power state. 
 
     
     
       13. The integrated circuit as recited in  claim 12  wherein the display controller is configured to display the plurality of prerendered frames according to time stamps associated with the plurality of prerendered frames. 
     
     
       14. The integrated circuit as recited in  claim 13  further comprising a first component that remains powered when other portions of the system are powered down, wherein the first component comprises a timer, and wherein the display controller is configured to set the timer based on a time stamp of a next frame of the plurality of prerendered frames, and wherein the first component is configured to cause a transition to the first power state responsive to expiration of the timer. 
     
     
       15. The integrated circuit as recited in  claim 12  wherein the dynamic content comprises at least one signal strength indicator. 
     
     
       16. The integrated circuit as recited in  claim 12  wherein the dynamic content comprises an indication of time. 
     
     
       17. The integrated circuit as recited in  claim 12  further comprising a first component that remains powered when other portions of the system are powered down, and wherein the first component is configured to read an ambient light sensor that is coupled to the integrated circuit during use, and wherein the first component is configured to detect a change in ambient light that is greater than a threshold, and wherein the first component is configured to cause a change to the first power state responsive to detecting the change. 
     
     
       18. The integrated circuit as recited in  claim 17  wherein the display controller is configured to update a displayed frame to reflect the change in the ambient light. 
     
     
       19. A method comprising:
 powering a display controller and a memory controller in a system on a chip (SOC) in a first power state of a plurality of power states for the SOC, wherein one or more processors forming central processing units (CPUs) in the SOC are powered down in the first power state; 
 reading a given frame of a plurality of prerendered frames from a memory controlled by the memory controller by the display controller in the first power state; 
 displaying the given frame by the display controller on a display in the first power state; 
 transitioning to a second power state of the plurality of power states in which the display controller is powered off, and 
 modifying a next frame of the plurality of prerendered frames with dynamic content identified for the plurality of prerendered frames subsequent to displaying the given frame and prior to transitioning to the second power state, wherein the next frame is to be displayed at a next transition to the first power state. 
 
     
     
       20. The method as recited in  claim 19  further comprising:
 reading an ambient light sensor; 
 responsive to detecting a change in ambient light that is greater than a threshold, transitioning to the first power state; and 
 changing a brightness of the frame in response to the change in ambient light.