US11502690B1ActiveUtility

Power supply generation for transmitter

53
Assignee: AVAGO TECH INT SALES PTE LIDPriority: Oct 27, 2021Filed: Oct 27, 2021Granted: Nov 15, 2022
Est. expiryOct 27, 2041(~15.3 yrs left)· nominal 20-yr term from priority
H03K 19/018521H03K 19/018514H03K 19/018507H03K 5/02H03K 3/037
53
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Claims

Abstract

Disclosed herein are related to systems and methods for providing different power supply levels. In one aspect, a first circuit generates a first signal having a first amplitude according to a first supply voltage. A latch may be coupled to a resistor of a plurality of resistors coupled in series. One end of the resistor may be configured to provide to the latch a second supply voltage higher than the first supply voltage according to a third supply voltage higher than the second supply voltage, and another end of the resistor may be configured to receive the third supply voltage. The latch may modify the first signal to provide a second signal, according to the second supply voltage. An amplifier may amplify the second signal to provide a third signal having a second amplitude larger than the first amplitude, according to the third supply voltage.

Claims

exact text as granted — not AI-modified
We claim: 
     
       1. A system comprising:
 circuitry to generate a first signal having a first voltage amplitude according to a first supply voltage, and comprising:
 a latch electrically coupled to a resistor of a plurality of resistors, the plurality of resistors coupled in series, one end of the resistor to provide a second supply voltage to the latch according to a third supply voltage, another end of the resistor to receive the third supply voltage, 
 
 wherein the circuitry is to:
 modify, by the latch, the first signal to provide a second signal, according to the second supply voltage higher than the first supply voltage, and 
 amplify the second signal to provide a third signal having a second voltage amplitude larger than the first voltage amplitude, according to the third supply voltage higher than the second supply voltage. 
 
 
     
     
       2. The system of  claim 1 ,
 wherein the circuitry is to generate the first signal swinging between the first supply voltage and a first source voltage, and 
 wherein the latch is to generate the second signal swinging between the second supply voltage and a second source voltage, the second source voltage higher than the first source voltage. 
 
     
     
       3. The system of  claim 2 , wherein an end of another resistor of the plurality of resistors is electrically coupled to the latch to provide the second source voltage. 
     
     
       4. The system of  claim 1 , wherein the circuitry further includes:
 another latch to modify the first signal to generate a fourth signal, 
 wherein the circuitry is to generate the third signal according to the second signal and the fourth signal. 
 
     
     
       5. The system of  claim 4 ,
 wherein the circuitry is to generate the first signal swinging between the first supply voltage and a first source voltage, 
 wherein the latch is to generate the second signal swinging between the second supply voltage and a second source voltage, the second source voltage higher than the first source voltage, and 
 wherein the another latch is to generate the fourth signal swinging between a fourth supply voltage and a third source voltage, the fourth supply voltage lower than the second source voltage, the third source voltage lower than the fourth supply voltage. 
 
     
     
       6. The system of  claim 5 , wherein one end of another resistor of the plurality of resistors is electrically coupled to the another latch to provide the fourth supply voltage to the another latch, according to the third supply voltage. 
     
     
       7. The system of  claim 5 , further comprising:
 at least a first resistor and a second resistor electrically coupled in series, 
 wherein one end of the first resistor is to receive the third supply voltage, and 
 wherein another end of the first resistor is electrically coupled to the another latch to provide the fourth supply voltage to the another latch, according to the third supply voltage. 
 
     
     
       8. The system of  claim 1 , wherein the circuitry includes:
 a capacitor electrically coupled to an input of the latch, 
 wherein the plurality of resistors are to:
 detect a change in the second signal attributed by the capacitor, and 
 adjust the second supply voltage to reduce a difference between i) the change in the second signal attributed by the capacitor, and ii) a third voltage amplitude of the second signal. 
 
 
     
     
       9. The system of  claim 1 , wherein the latch includes:
 a first inverter, 
 a second inverter, 
 a first port electrically coupled to an input of the first inverter and an output of the second inverter, and 
 a second port electrically coupled to an input of the second inverter and an output of the first inverter. 
 
     
     
       10. The system of  claim 9 , wherein the circuitry includes:
 a first circuit to generate the first signal, according to the first supply voltage, and 
 a second circuit to amplify the second signal to generate the third signal, according to the third supply voltage, 
 wherein the first port of the latch is electrically coupled to a first input of the second circuit, 
 wherein the second port of the latch is electrically coupled to a second input of the second circuit, and 
 wherein the circuitry further includes a capacitor electrically coupled between the first circuit and the first port. 
 
     
     
       11. The system of  claim 10 , wherein one end of another resistor of the plurality of resistors is coupled to the another end of the resistor, the system further comprising:
 another capacitor electrically coupled between the one end of the another resistor and another end of the another resistor. 
 
     
     
       12. The system of  claim 1 , wherein one or more of the plurality of resistors are variable resistors or programmable resistors. 
     
     
       13. A system comprising:
 a first latch to receive a first signal and generate a second signal swinging between a first supply voltage and a first source voltage according to the first signal; 
 a second latch to receive the first signal and generate a third signal swinging between a second supply voltage and a second source voltage according to the first signal; 
 an amplifier electrically coupled to the first latch and the second latch, the amplifier to receive the second signal and the third signal and generate a fourth signal based on a third supply voltage and a third source voltage; and 
 a resistor ladder electrically coupled to the first latch and the second latch, the resistor ladder to:
 provide the first supply voltage and the first source voltage to the first latch, according to the third supply voltage, and 
 provide the second supply voltage and the second source voltage to the second latch, according to the third supply voltage. 
 
 
     
     
       14. The system of  claim 13 , wherein the second signal is a differential signal, wherein the third signal is another differential signal. 
     
     
       15. The system of  claim 13 , wherein the amplifier includes:
 a first differential pair circuit including inputs electrically coupled to outputs of the first latch, and 
 a second differential pair circuit including inputs electrically coupled to outputs of the second latch, outputs of the first differential pair circuit electrically coupled to outputs of the second differential pair circuit. 
 
     
     
       16. The system of  claim 13 ,
 wherein the resistor ladder includes a first resistor and a second resistor electrically coupled in series, 
 wherein one end of the first resistor is to receive the third supply voltage, 
 wherein another end of the first resistor is electrically coupled to the second latch to provide the second supply voltage to the second latch, according to the third supply voltage, and 
 wherein one end of the second resistor is electrically coupled to the second latch to provide the second source voltage to the second latch, according to the third supply voltage. 
 
     
     
       17. The system of  claim 16 ,
 wherein the resistor ladder further includes a third resistor and a fourth resistor electrically coupled in series with the first resistor and the second resistor, 
 wherein one end of the third resistor is electrically coupled to the first latch to provide the first supply voltage to the first latch, according to the third supply voltage, and 
 wherein one end of the fourth resistor is electrically coupled to the first latch to provide the first source voltage to the first latch, according to the third supply voltage. 
 
     
     
       18. The system of  claim 16 ,
 wherein the third supply voltage is higher than the second supply voltage, 
 wherein the second supply voltage is higher than the first supply voltage, 
 wherein the second source voltage is higher than the first source voltage, and 
 wherein the first source voltage is higher than the third source voltage. 
 
     
     
       19. A method comprising:
 generating, by circuitry, a first signal having a first voltage amplitude, according to a first supply voltage; 
 modifying, by a latch of the circuitry, the first signal to generate a second signal having a second voltage amplitude, according to a second supply voltage higher than the first supply voltage; 
 detecting, by a resistor ladder of the circuitry, a change in the second signal attributed by a capacitor coupled to an input of the latch; and 
 adjusting, by the resistor ladder of the circuitry, the second supply voltage, according to the detected change in the second signal. 
 
     
     
       20. The method of  claim 19 , wherein adjusting, by the resistor ladder, the second supply voltage, according to the detected change in the second signal includes:
 adjusting, by the resistor ladder, the second supply voltage to reduce a difference between i) the change in the second signal attributed by the capacitor, and ii) the second voltage amplitude.

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