Gate drive apparatus and method thereof

Abstract

A method includes detecting a signal on a switching node connected to a power switch, detecting a gate drive voltage of the power switch, during a gate drive process of the power switch, reducing a gate drive current based on a first comparison result obtained from comparing the signal with a first threshold, and during the gate drive process of the power switch, increasing the gate drive current based on a second comparison result obtained from comparing the gate drive voltage with a second threshold.

What is claimed is: 
     
       1. An apparatus comprising:
 a pull-up gate drive circuit configured to reduce a pull-up current fed into a gate of a power switch from a first predetermined pull-up current level to a second predetermined pull-up current level once a signal on a switching node changes over a first turn-on threshold, and increase the pull-up current fed into the gate of the power switch from the second predetermined pull-up current level to the first predetermined pull-up current level once a gate drive voltage exceeds a second turn-on threshold; and 
 a pull-down gate drive circuit configured to reduce a pull-down current drawn from the gate of the power switch from a first predetermined pull-down current level to a second predetermined pull-down current level once the signal on the switching node changes over a first turn-off threshold, and increase the pull-down current drawn from the gate of the power switch from the second predetermined pull-down current level to the first predetermined pull-down current level once the gate drive voltage drops below a second turn-off threshold. 
 
     
     
       2. The apparatus of  claim 1 , wherein:
 the pull-up gate drive circuit comprises a plurality of pull-up switch-resistor networks connected in parallel; and 
 the pull-down gate drive circuit comprises a plurality of pull-down switch-resistor networks connected in parallel. 
 
     
     
       3. The apparatus of  claim 1 , wherein:
 the pull-up gate drive circuit and the pull-down gate drive circuit are connected in series between a bias voltage bus and ground, and wherein a common node of the pull-up gate drive circuit and the pull-down gate drive circuit is connected to the gate of the power switch. 
 
     
     
       4. The apparatus of  claim 1 , wherein:
 the pull-up gate drive circuit comprises a plurality of pull-up switches connected in parallel; and 
 the pull-down gate drive circuit comprises a plurality of pull-down switches connected in parallel. 
 
     
     
       5. The apparatus of  claim 4 , wherein:
 at least one gate drive voltage applied to one of the plurality of pull-up switches is modulated so as to adjust the pull-up current flowing through the pull-up gate drive circuit. 
 
     
     
       6. The apparatus of  claim 4 , wherein:
 at least one gate drive voltage applied to one of the plurality of pull-down switches is modulated so as to adjust the pull-down current flowing through the pull-down gate drive circuit. 
 
     
     
       7. The apparatus of  claim 1 , wherein:
 the signal on the switching node is a voltage on the switching node. 
 
     
     
       8. The apparatus of  claim 1 , wherein:
 the signal on the switching node is a variable selected from the group consisting of a switching node voltage difference over time, a slew rate of the switching node voltage difference over time and a current flowing through the power switch. 
 
     
     
       9. A method comprising:
 directly detecting, by a sensing circuit, a voltage on a common node of a power switch and an adjacent power switch connected to the power switch; 
 detecting a gate drive voltage of the power switch; 
 during a gate drive process of the power switch, reducing a gate drive current based on a first comparison result obtained from comparing the voltage with a first threshold; and 
 during the gate drive process of the power switch, increasing the gate drive current based on a second comparison result obtained from comparing the gate drive voltage with a second threshold. 
 
     
     
       10. The method of  claim 9 , further comprising:
 during a turn-on process of the power switch, reducing a pull-up current fed into a gate of the power switch from a first predetermined current level to a second predetermined current level once the voltage on the switching node changes over the first threshold; and 
 during the turn-on process of the power switch, increasing the pull-up current fed into the gate of the power switch from the second predetermined current level to the first predetermined current level once the gate drive voltage exceeds the second threshold. 
 
     
     
       11. The method of  claim 10 , further comprising:
 during the turn-on process of the power switch, reducing a turn-on gate transition time through adjusting a difference between the first predetermined current level and the second predetermined current level. 
 
     
     
       12. The method of  claim 10 , wherein:
 during the turn-on process of the power switch, the first comparison result obtained from comparing the signal with the first threshold is used to determine when the power switch enters into a Miller plateau phase of the turn-on process. 
 
     
     
       13. The method of  claim 12 , wherein:
 during the turn-on process of the power switch, the second comparison result obtained from comparing the gate drive voltage with the second threshold is used to determine when the power switch leaves the Miller plateau phase of the turn-on process. 
 
     
     
       14. The method of  claim 9 , further comprising:
 during a turn-off process of the power switch, reducing a pull-down current drawn from a gate of the power switch from a first predetermined current level to a second predetermined current level once the voltage on the switching node changes over the first threshold; and 
 during the turn-off process of the power switch, increasing the pull-down current drawn from the gate of the power switch from the second predetermined current level to the first predetermined current level once the gate drive voltage drops below the second threshold. 
 
     
     
       15. The method of  claim 14 , further comprising:
 during the turn-off process of the power switch, reducing a turn-off gate transition time through adjusting a difference between the first predetermined current level and the second predetermined current level. 
 
     
     
       16. The method of  claim 14 , wherein:
 during the turn-off process of the power switch, the first comparison result obtained from comparing the signal with the first threshold is used to determine when the power switch enters into a Miller plateau phase of the turn-off process of the power switch. 
 
     
     
       17. The method of  claim 14 , wherein:
 during the turn-off process of the power switch, the second comparison result obtained from comparing the gate drive voltage with the second threshold is used to determine when the power switch leaves a Miller plateau phase of the turn-off process of the power switch. 
 
     
     
       18. A controller comprising:
 a first sensing circuit configured to receive a gate drive voltage of a power switch; 
 a second sensing circuit configured to receive a voltage on a switching node connected to the power switch; and 
 an adaptive slew rate control apparatus comprising a pull-up gate drive circuit and a pull-down gate drive circuit, wherein:
 the pull-up gate drive circuit is configured to reduce a pull-up current fed into a gate of the power switch from a first predetermined pull-up current level to a second predetermined pull-up current level once the voltage on the switching node changes over a first turn-on threshold, and increase the pull-up current fed into the gate of the power switch from the second predetermined pull-up current level to the first predetermined pull-up current level once the gate drive voltage exceeds a second turn-on threshold; and 
 the pull-down gate drive circuit is configured to reduce a pull-down current drawn from the gate of the power switch from a first predetermined pull-down current level to a second predetermined pull-down current level once the voltage on the switching node changes over a first turn-off threshold, and increase the pull-down current drawn from the gate of the power switch from the second predetermined pull-down current level to the first predetermined pull-down current level once the gate drive voltage drops below a second turn-off threshold. 
 
 
     
     
       19. The controller of  claim 18 , wherein:
 the pull-up gate drive circuit comprises a plurality of pull-up switch-resistor networks connected in parallel, and wherein each pull-up switch-resistor network comprises a first switch and a first resistor connected in series between a first voltage bus and the gate of the power switch; and 
 the pull-down gate drive circuit comprises a plurality of pull-down switch-resistor networks connected in parallel, and wherein each pull-down switch-resistor network comprises a second resistor and a second switch connected in series between the gate of the power switch and a second voltage bus lower than the first voltage bus. 
 
     
     
       20. The controller of  claim 18 , wherein:
 the first predetermined pull-up current level is at least twice the second predetermined pull-up current level; and 
 the first predetermined pull-down current level is at least twice the second predetermined pull-down current level.