Systems and methods for segmented constant current control

Abstract

System and method for current control. As an example, the system for current control includes: a transistor including a drain terminal, a gate terminal, and a source terminal, the drain terminal being coupled to one or more light emitting diodes; a resistor coupled to the source terminal of the transistor and configured to generate a resistor voltage related to a current flowing through the one or more emitting diodes; a voltage detector configured to receiver a first input voltage related to a second input voltage received by the one or more light emitting diodes; and a voltage controller coupled to the voltage detector, the resistor, and the gate terminal of the transistor; wherein the voltage detector is further configured to: detect the first input voltage; and generate a control signal based at least in part on the first input voltage.

What is claimed is: 
     
       1. A system for current control, the system comprising:
 a transistor including a drain terminal, a gate terminal, and a source terminal, the drain terminal being coupled to one or more light emitting diodes; 
 a resistor coupled to the source terminal of the transistor and configured to generate a resistor voltage related to a current flowing through the one or more emitting diodes; 
 a voltage detector configured to receive a first input voltage related to a second input voltage received by the one or more light emitting diodes; and 
 a voltage controller coupled to the voltage detector, the resistor, and the gate terminal of the transistor; 
 wherein the voltage detector is further configured to:
 detect the first input voltage; and 
 generate a control signal based at least in part on the first input voltage; 
 
 wherein the voltage controller includes a switch and is configured to:
 receive the control signal from the voltage detector; 
 receive the resistor voltage from the resistor; 
 select one reference voltage from three or more reference voltages based at least in part on the control signal via the switch; 
 use at least the resistor voltage and the one reference voltage of the three or more reference voltages based at least in part on the control signal to generate a gate voltage; and 
 output the gate voltage to the gate terminal of the transistor; 
 
 wherein:
 if the first input voltage becomes larger than a predetermined voltage magnitude, the one reference voltage changes from a first reference voltage of the three or more reference voltages to a second reference voltage of the three or more reference voltages; and 
 if the first input voltage becomes smaller than the predetermined voltage magnitude, the one reference voltage changes from the second reference voltage to the first reference voltage; 
 
 wherein the first reference voltage is larger than the second reference voltage. 
 
     
     
       2. The system of  claim 1  wherein:
 the voltage controller further includes an operational amplifier coupled to the switch; 
 the switch is configured to:
 output the selected one reference voltage to the operational amplifier. 
 
 
     
     
       3. The system of  claim 1  wherein:
 the voltage controller includes a plurality of operational amplifiers and the switch coupled to the plurality of operational amplifiers; 
 the plurality of operational amplifiers are configured to:
 receive the three or more reference voltages respectively; and 
 generate three or more output voltages respectively; 
 
 the switch is configured to:
 receive the control signal; 
 select one output voltage from the three or more output voltages based at least in part on the control signal; and 
 output the selected one output voltage as the gate voltage. 
 
 
     
     
       4. The system of  claim 1 , and further comprising:
 a voltage comparator configured to:
 receive the resistor voltage from the resistor and a threshold voltage; 
 compare the resistor voltage and the threshold voltage; and 
 generate a comparison signal based at least in part on the resistor voltage and the threshold voltage; 
 
 wherein the voltage comparator is further configured to:
 generate the comparison signal at a first logic level if the resistor voltage is smaller than the threshold voltage; and 
 generate the comparison signal at a second logic level if the resistor voltage is larger than the threshold voltage, the second logic level being different from the first logic level. 
 
 
     
     
       5. The system of  claim 1  wherein:
 the voltage detector is further configured to receive the first input voltage from a voltage divider configured to receive the second input voltage; and 
 the first input voltage is directly proportional to the second input voltage. 
 
     
     
       6. The system of  claim 1  wherein:
 the voltage controller includes an operational amplifier and a capacitor, the operational amplifier including a first amplifier terminal, a second amplifier terminal and a third amplifier terminal, the capacitor including a first capacitor terminal and a second capacitor terminal; 
 wherein:
 the first amplifier terminal is configured to receive a predetermined reference voltage of the three or more reference voltages; 
 the second amplifier terminal is configured to receive the resistor voltage; and 
 the third amplifier terminal is coupled to the first capacitor terminal; 
 
 wherein the operation amplifier is configured to, if the predetermined reference voltage of the three or more reference voltages is selected to be the one reference voltage, generate the gate voltage with the capacitor. 
 
     
     
       7. The system of  claim 6  wherein:
 the predetermined reference voltage of the three or more reference voltages is the largest reference voltage of the three or more reference voltages; and 
 the second capacitor terminal is biased to a ground voltage. 
 
     
     
       8. The system of  claim 1  wherein:
 the voltage controller includes a first operational amplifier, a capacitor, and a second operational amplifier; 
 the first operational amplifier includes a first amplifier terminal, a second amplifier terminal and a third amplifier terminal; 
 the capacitor includes a first capacitor terminal and a second capacitor terminal; and 
 the second operational amplifier includes a fourth amplifier terminal, a fifth amplifier terminal and a sixth amplifier terminal; 
 wherein:
 the first amplifier terminal is configured to receive a predetermined reference voltage of the three or more reference voltages; 
 the second amplifier terminal is configured to receive the resistor voltage; and 
 the third amplifier terminal is coupled to the first capacitor terminal; 
 
 wherein the first operational amplifier is configured to:
 generate an amplified voltage with the capacitor at the third amplifier terminal; and 
 if the predetermined reference voltage of the three or more reference voltages is selected to be the one reference voltage, output the amplified voltage from the third amplifier terminal to the fourth amplifier terminal; 
 
 wherein:
 the fifth amplifier terminal is configured to receive the resistor voltage; and 
 the sixth amplifier terminal is configured to output the gate voltage to the gate terminal of the transistor. 
 
 
     
     
       9. The system of  claim 8  wherein:
 the predetermined reference voltage of the three or more reference voltages is the largest reference voltage of three or more reference voltages; and 
 the second capacitor terminal is biased to a ground voltage. 
 
     
     
       10. The system of  claim 1  wherein:
 the voltage controller includes a first operational amplifier, a capacitor, and one or more second operational amplifiers, the first operational amplifier including a first amplifier terminal, a second amplifier terminal and a third amplifier terminal, the capacitor including a first capacitor terminal and a second capacitor terminal; 
 wherein:
 the first amplifier terminal is configured to receive a predetermined reference voltage of the three or more reference voltages; 
 the second amplifier terminal is configured to receive the resistor voltage; and 
 the third amplifier terminal is coupled to the first capacitor terminal; 
 
 wherein:
 the first operational amplifier is configured to generate a first amplified voltage with the capacitor; and 
 the one or more second operational amplifiers are configured to:
 receive one or more reference voltages of the three or more reference voltages, each of the one or more reference voltages being different from the predetermined reference voltage; and 
 generate one or more second amplified voltages bases at least in part on the one or more reference voltages respectively; 
 
 
 wherein the first operational amplifier is configured to, if the predetermined reference voltage of the three or more reference voltages is selected to be the one reference voltage, output the first amplified voltage as the gate voltage. 
 
     
     
       11. The system of  claim 10  wherein the one or more second operational amplifiers are configured to, if the predetermined reference voltage of the three or more reference voltages is not selected to be the one reference voltage, output one amplified voltage of the one or more second amplified voltages as the gate voltage. 
     
     
       12. The system of  claim 10  wherein:
 the predetermined reference voltage of the three or more reference voltages is the largest reference voltage of the three or more reference voltages; and 
 the second capacitor terminal is biased to a ground voltage. 
 
     
     
       13. A method for current control, the method comprising:
 receiving, by a resistor, a current flowing through one or more light emitting diodes, the resistor being coupled to a source terminal of a transistor, the transistor further including a gate terminal and a drain terminal coupled to the one or more light emitting diodes; 
 generating a resistor voltage related to the current flowing through the one or more emitting diodes; 
 receiving a first input voltage related to a second input voltage received by the one or more light emitting diodes; 
 detecting the first input voltage; 
 generating a control signal based at least in part on the first input voltage; 
 receiving the resistor voltage and the control signal; 
 selecting one reference voltage from three or more reference voltages based at least in part on the control signal; 
 using at least the resistor voltage and the one reference voltage of the three or more reference voltages based at least in part on the control signal to generate a gate voltage; and 
 outputting the gate voltage to the gate terminal of the transistor; 
 wherein:
 if the first input voltage becomes larger than a predetermined voltage magnitude, the one reference voltage changes from a first reference voltage of the three or more reference voltages to a second reference voltage of the three or more reference voltages; and 
 if the first input voltage becomes smaller than the predetermined voltage magnitude, the one reference voltage changes from the second reference voltage to the first reference voltage; 
 
 wherein the first reference voltage is larger than the second reference voltage. 
 
     
     
       14. The method of  claim 13  wherein the using at least the resistor voltage and the one reference voltage of the three or more reference voltages based at least in part on the control signal to generate a gate voltage includes:
 determining a difference between the resistor voltage and the selected one reference voltage; and 
 generating the gate voltage based at least in part on the difference between the resistor voltage and the selected one reference voltage. 
 
     
     
       15. The method of  claim 13  wherein the using at least the resistor voltage and one reference voltage of three or more reference voltages based at least in part on the control signal to generate a gate voltage includes:
 receiving the three or more reference voltages respectively; 
 determining a plurality of differences between the three or more reference voltages and the resistor voltage respectively; 
 generating a plurality of output voltages based at least in part on the plurality of differences respectively; 
 selecting one output voltage from the plurality of output voltages based at least in part on the control signal; and 
 generating the selected one output voltage as the gate voltage. 
 
     
     
       16. The method of  claim 13 , and further comprising:
 receiving the resistor voltage from the resistor and a threshold voltage; 
 comparing the resistor voltage and the threshold voltage; and 
 generating a comparison signal based at least in part on the resistor voltage and the threshold voltage; 
 wherein the generating a comparison signal based at least in part on the resistor voltage and the threshold voltage includes:
 generating the comparison signal at a first logic level if the resistor voltage is smaller than the threshold voltage; and 
 generating the comparison signal at a second logic level if the resistor voltage is larger than the threshold voltage, the second logic level being different from the first logic level.