NVMe-based data writing method, apparatus, and system

Abstract

In an NVMe-based storage system, a host is connected to an NVMe controller through a PCIe bus, and the NVMe controller is connected to a storage medium. The NVMe controller receives from the host a data packet that carries payload data and an association identifier. The association identifier associates the payload data with a write instruction. The NVMe controller obtains the write instruction according to the association identifier, and then writes the payload data into the storage medium according to the write instruction.

What is claimed is: 
     
       1. A non-volatile memory express (NVMe)-based data storage system, comprising:
 a host; 
 an NVMe controller; and 
 a storage medium for storing data, wherein the host is connected to the NVMe controller through a peripheral component interconnect express (PCIe) bus, and the NVMe controller is connected to the storage medium; 
 wherein the host is configured to: 
 send a data packet to the NVMe controller, wherein the data packet carries payload data and an association identifier, and the association identifier associates the payload data with a write instruction; 
 wherein the NVMe controller is configured to: 
 obtain the write instruction according to the association identifier; and 
 write the payload data into the storage medium according to the write instruction; 
 wherein the NVMe controller comprises an internal memory, and before writing the payload data into the storage medium, the NVMe controller is further configured to:
 allocate storage space in the internal memory for the payload data; 
 store the payload data in the allocated storage space; and 
 record a mapping relationship between the allocated storage space and the association identifier; 
 
 wherein the internal memory comprises a plurality of memory blocks; 
 wherein the NVMe controller is further configured to provide the host with a quantity of memory blocks in the internal memory and a size of the memory block; 
 wherein the host further comprises a counter configured to indicate a quantity of unoccupied memory blocks; and 
 wherein after sending the data packet to the NVMe controller, the host is further configured to reduce a value of the counter. 
 
     
     
       2. The system according to  claim 1 , wherein after writing the payload data into the storage medium, the NVMe controller is further configured to trigger a memory block release report, and the memory block release report indicates that the NVMe controller releases one or more memory blocks; and
 wherein the host is further configured to: obtain the memory block release report, and increase the value of the counter based on the memory block release report. 
 
     
     
       3. The system according to  claim 2 , wherein the host comprises a plurality of counters, and each counter corresponds to at least one write instruction;
 wherein the memory block release report further comprises the association identifier; and 
 wherein the host is further configured to increase, based on the memory block release report and the association identifier, a value of a counter corresponding to the write instruction. 
 
     
     
       4. The system according to  claim 1 , wherein the data packet is a PCIe packet, and the association identifier is first address information of the PCIe packet; and
 wherein the NVMe controller is further configured to: 
 determine second address information based on the first address information; and 
 obtain the write instruction based on the second address information, wherein the second address information indicates a storage location of the write instruction. 
 
     
     
       5. The system according to  claim 1 , wherein the NVMe controller is further configured to:
 determine the association identifier based on the write instruction; and 
 obtain the payload data from the storage space based on the association identifier. 
 
     
     
       6. The system according to  claim 1 , wherein the NVMe controller is further configured to determine an order of the payload data in to-be-written data based on an order of receiving data packets. 
     
     
       7. The system according to  claim 1 , wherein the data packet further carries an order identifier, and the order identifier indicates an order of the payload data in to-be-written data. 
     
     
       8. The system according to  claim 1 , wherein the host is further configured to generate the write instruction. 
     
     
       9. A data writing method performed by a non-volatile memory express (NVMe) controller, comprising:
 receiving a data packet from a host, wherein the host is connected to the NVMe controller through a peripheral component interconnect express (PCIe) bus, and the NVMe controller is connected to a storage medium, and wherein the data packet carries payload data and an association identifier, and the association identifier associates the payload data with a write instruction; 
 obtaining the write instruction according to the association identifier; and 
 writing the payload data into the storage medium according to the write instruction; 
 wherein the NVMe controller comprises an internal memory, and before writing the payload data into the storage medium, the method further comprises:
 allocating storage space in the internal memory for the payload data; 
 storing the payload data in the allocated storage space; and 
 recording a mapping relationship between the allocated storage space and the association identifier; 
 
 wherein the internal memory comprises a plurality of memory blocks; 
 wherein the method further comprises:
 providing the host with a quantity of memory blocks in the internal memory and a size of the memory block; 
 
 wherein after writing the payload data into the storage medium, the method further comprises:
 triggering a memory block release report, wherein the memory block release report indicates that the NVMe controller releases one or more memory blocks; and 
 
 wherein the memory block release report further comprises the association identifier, and the memory block release report indicates that the NVMe controller releases one or more memory blocks occupied by a write operation corresponding to the association identifier. 
 
     
     
       10. The method according to  claim 9 , wherein the data packet is a PCIe packet, and the association identifier is first address information of the PCIe packet, and the method further comprises:
 determining second address information based on the first address information; and 
 obtaining the write instruction based on the second address information, wherein the second address information indicates a storage location of the write instruction. 
 
     
     
       11. The method according to  claim 9 , wherein the association identifier comprises fields of the write instruction; and
 wherein the method further comprises: 
 obtaining the write instruction based on the association identifier. 
 
     
     
       12. The method according to  claim 9 , further comprising:
 determining the association identifier based on the write instruction; and 
 obtaining the payload data from the storage space based on the association identifier. 
 
     
     
       13. The method according to  claim 9 , further comprising:
 determining an order of the payload data in to-be-written data based on an order of receiving data packets. 
 
     
     
       14. A non-volatile memory express (NVMe) controller in a NVMe-based storage system, wherein a host is connected to the NVMe controller through a peripheral component interconnect express (PCIe) bus, and the NVMe controller is connected to a storage medium, the NVMe controller comprising:
 a memory storing executable instructions; and 
 a processor configured to execute the executable instructions to configure the NVMe controller to perform operations comprising:
 receiving a data packet from the host, wherein the data packet carries payload data and an association identifier, and the association identifier associates the payload data with a write instruction; 
 obtaining the write instruction according to the association identifier; and 
 
 writing the payload data into the storage medium according to the write instruction; 
 wherein the NVMe controller comprises an internal memory, and before writing the payload data into the storage medium, the operations further comprise:
 allocating storage space in the internal memory for the payload data; 
 storing the payload data in the allocated storage space; and 
 recording a mapping relationship between the allocated storage space and the association identifier; 
 
 wherein the internal memory comprises a plurality of memory blocks; 
 wherein the operations further comprise:
 providing the host with a quantity of memory blocks in the internal memory and a size of the memory block; 
 
 wherein after writing the payload data into the storage medium, the operations further comprise:
 triggering a memory block release report, wherein the memory block release report indicates that the NVMe controller releases one or more memory blocks; and 
 wherein the memory block release report further comprises the association identifier, and the memory block release report indicates that the NVMe controller releases one or more memory blocks occupied by a write operation corresponding to the association identifier.