Display apparatus having an oxide semiconductor pattern

Abstract

A display apparatus in which a thin film transistor of each pixel region includes an oxide semiconductor pattern is provided. The pixel regions can be disposed on a display area of a device substrate. The display area can be electrically connected to the gate driver by gate lines. An encapsulating element can be disposed on the thin film transistor of each pixel region. The encapsulating element can extend beyond the display area. The gate lines can overlap the encapsulating element. A barrier line can be disposed between the gate lines and the encapsulating element. The barrier line can include a hydrogen barrier material. Thus, in the display apparatus, the characteristics deterioration of the thin film transistor due to the encapsulating element can be prevented or minimized.

What is claimed is: 
     
       1. A display apparatus comprising:
 pixel regions, each of the pixel regions including a driving circuit and a light-emitting device connected to the driving circuit, the driving circuit including an oxide semiconductor pattern; 
 a gate driver disposed outside the pixel regions and connected to each pixel region by gate lines; 
 an encapsulating element overlapping with the gate lines; and 
 a first barrier line between the gate lines and the encapsulating element, the first barrier line intersecting the gate lines, 
 wherein the first barrier line includes a hydrogen barrier material. 
 
     
     
       2. The display apparatus according to  claim 1 , wherein the hydrogen barrier material includes titanium (Ti). 
     
     
       3. The display apparatus according to  claim 1 , wherein the first barrier line is disposed between the pixel regions and the gate driver. 
     
     
       4. The display apparatus according to  claim 1 , wherein in each pixel region, the light-emitting device is disposed between the oxide semiconductor pattern and the encapsulating element. 
     
     
       5. The display apparatus according to  claim 1 , further comprising a pad region disposed outside the pixel regions,
 wherein the pad region is connected to each pixel region by data lines, and 
 wherein the data lines include a same material as the first barrier line. 
 
     
     
       6. The display apparatus according to  claim 5 , wherein the first barrier line is spaced away from the data lines. 
     
     
       7. The display apparatus according to  claim 1 , further comprising a second barrier line disposed between the first barrier line and the gate driver. 
     
     
       8. The display apparatus according to  claim 7 , wherein the second barrier line extends side by side with the first barrier line. 
     
     
       9. The display apparatus according to  claim 1 , further comprising a pad region disposed outside the pixel regions,
 wherein the pad region is connected to each pixel region by data lines, and 
 wherein the first barrier line is connected to the pad region. 
 
     
     
       10. The display apparatus according to  claim 1 , wherein the driving circuit includes a gate electrode overlapping with a channel region of the oxide semiconductor pattern, and
 wherein the gate electrode is connected to one of the gate lines. 
 
     
     
       11. The display apparatus according to  claim 10 , wherein the driving circuit further includes:
 a gate insulating layer disposed between the oxide semiconductor pattern and the gate electrode, 
 a source electrode connected to a source region of the oxide semiconductor pattern, and 
 a drain electrode connected to a drain region of the oxide semiconductor pattern, and 
 wherein the source electrode and the drain electrode are disposed on a same layer as the first barrier layer. 
 
     
     
       12. A display apparatus comprising:
 a device substrate including a display area and a non-display area disposed outside the display area; 
 a gate driver disposed on the non-display area of the device substrate, and connected to the display area by gate lines; 
 a barrier line intersecting the gate lines, and including a hydrogen barrier material; and 
 an encapsulating element covering the gate lines, 
 wherein the barrier line is disposed between the gate lines and the encapsulating element. 
 
     
     
       13. The display apparatus according to  claim 12 , further comprising driving circuits on the display area of the device substrate,
 wherein each of the driving circuits includes a thin film transistor connected to one of the gate lines, and 
 wherein the thin film transistor includes an oxide semiconductor pattern. 
 
     
     
       14. The display apparatus according to  claim 12 , further comprising a pad region disposed on the non-display area of the device substrate and connected to the display area by data lines,
 wherein a stacked structure of each of the data lines includes at least one layer formed as a same material as the barrier line. 
 
     
     
       15. The display apparatus according to  claim 14 , wherein the stacked structure of each of the data lines is different from a stacked structure of the barrier line. 
     
     
       16. The display apparatus according to  claim 12 , wherein the barrier line is disposed between the display area and the gate driver along an edge of the display area. 
     
     
       17. The display apparatus according to  claim 16 , wherein the barrier line has a closed loop shape extending along the edge of the display area. 
     
     
       18. The display apparatus according to  claim 12 , wherein the barrier line includes:
 a first region having a first width, and 
 a second region having a second width larger than the first width of the first region, 
 wherein a corner of the display area has a round shape, and 
 wherein the second region of the barrier line corresponds to the corner of the display area. 
 
     
     
       19. The display apparatus according to  claim 18 , wherein a distance between the barrier line and the display area is constant. 
     
     
       20. The display apparatus according to  claim 12 , wherein hydrogen diffused from the encapsulating element toward the gate lines is absorbed and/or blocked by the barrier line.