LED display driving device and LED display device

Abstract

An embodiment relates to a technique for driving an LED display. In a method of controlling grayscale of pixels dividedly by N subframes (N is a natural number of 2 or greater), a pulse width modulation (PWM) control value of each subframe may be calculated by a precalculator disposed at a front end of latches, thereby simplifying a circuit.

What is claimed is: 
     
       1. An LED (light emitting diode) display driving device that controls grayscale of a pixel by distributing the grayscale to N subframes (N is a natural number of 2 or greater), the LED display driving device comprising:
 a memory configured to store grayscale values of pixels; 
 a plurality of channel circuits, each configured to perform pulse width modulation (PWM) control on power supplied to each pixel according to a PWM control value; and 
 a precalculator configured to read K grayscale values at a time (K is a natural number), to calculate PWM control values in one subframe from the grayscale values, and to forward the PWM control values to the channel circuits, 
 wherein the precalculator comprises K sub-precalculators and each sub-precalculator calculates one PWM control value from one grayscale value and forwards the one PWM control value to one channel circuit. 
 
     
     
       2. The LED display driving device of  claim 1 , wherein the sub-precalculators comprise an odd-number precalculator configured to calculate the PWM control values for odd-numbered channel circuits and an even-number precalculator configured to calculate the PWM control values for even-numbered channel circuits. 
     
     
       3. The LED display driving device of  claim 1 , wherein the precalculator further comprises a distributor configured to distribute the grayscale values, read from the memory, to the sub-precalculators. 
     
     
       4. The LED display driving device of  claim 1 , wherein the sub-precalculators are divided according to a color of each pixel or a positional order of each pixel. 
     
     
       5. The LED display driving device of  claim 1 , wherein the precalculator stores the PWM control values in latches and the channel circuits read the PWM control values from the latches. 
     
     
       6. The LED display driving device of  claim 1 , wherein the memory comprises two areas, each used alternately as a reading area and a writing area, wherein, when one area is used as a reading area, the other area is used as a writing area and vice versa, and the precalculator reads the grayscale values from the reading area. 
     
     
       7. The LED display driving device of  claim 1 , further comprising:
 a communication circuit configured to receive image data comprising the grayscale values and a communication clock; and 
 a clock multiplier configured to generate an internal clock by increasing the frequency of the communication clock by R (R is a natural number of 2 or greater) times and to forward the internal clock to the precalculator. 
 
     
     
       8. The LED display driving device of  claim 1 , wherein the PWM control value comprises a common PWM value calculated according to an upper bit value and an additional PWM value calculated according to a lower bit value, and
 the precalculator determines a quotient obtained by dividing a grayscale value by N as the upper bit value, determines a remainder obtained by dividing the grayscale values by N as the lower bit value, sets the additional PWM value to 1 in as many subframes as the lower bit value among the subframes, and sets the additional PWM value to 0 in remaining subframes. 
 
     
     
       9. The LED display driving device of  claim 8 , wherein, when the grayscale value is for a pixel in a first line, the precalculator increases the common PWM value by a first offset value. 
     
     
       10. The LED display driving device of  claim 8 , wherein, when the common PWM value is less than or equal to a reference value, the precalculator increases the common PWM value by a second offset value. 
     
     
       11. The LED display driving device of  claim 8 , wherein, when the common PWM value is less than or equal to a minimum value, the precalculator sets a minimum flag value to 1 and comprises the minimum flag value in the PWM control value. 
     
     
       12. A light emitting diode (LED) display device comprising:
 a data processing device configured to transmit image data comprising grayscale values of a plurality of pixels, each comprising an LED; and 
 a driving device, configured to control grayscale of a pixel by distributing the grayscale to N subframes (N is a natural number of 2 or greater), comprising a memory configured to store the grayscale values of pixels, a plurality of channel circuits, each configured to perform pulse width modulation (PWM) control on power supplied to each pixel according to a PWM control value, and a precalculator configured to read K grayscale values at a time (K is a natural number), to calculate PWM control values in one subframe from the grayscale values, and to forward the PWM control values to the channel circuits 
 wherein the precalculator comprises K sub-precalculators and each sub-precalculator calculates one PWM control value from one grayscale value and forwards the one PWM control value to one channel circuit. 
 
     
     
       13. The LED display device of  claim 12 , wherein the data processing device transmits option information comprising the number of the subframes to the driving device. 
     
     
       14. The LED display device of  claim 12 , wherein the data processing device transmits a communication clock along with the image data to the driving device and the driving device generates an internal clock by increasing the frequency of the communication clock by M (M is a natural number of 2 or greater) times.