Multilayer capacitor and board having the same mounted thereon

Abstract

A multilayer capacitor and a board having the same mounted thereon are provided. The multilayer capacitor includes a capacitor body including dielectric layers and first and second internal electrodes, and first to sixth surfaces, the first internal electrode being exposed through the third surface and the fifth surface and the second internal electrode being exposed through the fourth surface and the sixth surface; first and second side portions disposed on the fifth and sixth surfaces, respectively, of the capacitor body; first and second external electrodes; a first step-compensating portion disposed on a margin portion in a width direction on the second dielectric layer on which the second internal electrode is formed on the first internal electrode; and a second step-compensating portion disposed on another margin portion in the width direction on the first dielectric layer on which the first internal electrode is disposed on the second internal electrode.

What is claimed is: 
     
       1. A multilayer capacitor, comprising:
 a capacitor body comprising first and second dielectric layers and first and second internal electrodes, and a first surface and a second surface opposing each other, a third surface and a fourth surface connected to the first and second surfaces and opposing each other, and a fifth surface and a sixth surface connected to the first to fourth surfaces and opposing each other, the first internal electrode being exposed through the third surface and the fifth surface and the second internal electrode being exposed through the fourth surface and the sixth surface; 
 first and second side portions disposed on the fifth and sixth surfaces, respectively, of the capacitor body; 
 first and second external electrodes respectively disposed on the third and fourth surfaces of the body and respectively connected to the first and second internal electrodes; 
 a first step-compensating portion disposed on a first margin portion in a width direction on the second dielectric layer on which the second internal electrode is disposed, the first step-compensating portion being disposed on a first side of the first internal electrode in the width direction such that a second side of the first internal electrode in the width direction is devoid of a step-compensating portion thereon; and 
 a second step-compensating portion disposed on a second margin portion in the width direction on the first dielectric layer on which the first internal electrode is disposed, the second step-compensating portion being disposed on a first side of the second internal electrode in the width direction such that a second side of the second internal electrode in the width direction is devoid of a step-compensating portion thereon, 
 wherein a thickness of each of the first and second step-compensating portions is smaller than a thickness of each of the first and second dielectric layers. 
 
     
     
       2. The multilayer capacitor of  claim 1 , wherein the first and second external electrodes comprise:
 first and second connecting portions respectively disposed on the third and fourth surfaces of the capacitor body and respectively connected to the first and second internal electrodes; and 
 first and second band portions respectively extending to a portion of the first surface of the body from the first and second connecting portions. 
 
     
     
       3. The multilayer capacitor of  claim 1 , wherein the first step-compensating portion and the first internal electrode are made of a same material, and the second step-compensating portion and the second internal electrode are made of a same material. 
     
     
       4. The multilayer capacitor of  claim 1 , wherein the first margin portion is a portion in which the first and second internal electrodes do not overlap with each other,
 the first side portion is disposed on the first margin portion, 
 the second margin portion is another portion in which the first and second internal electrodes do not overlap with each other, and 
 the second side portion is disposed on the second margin portion. 
 
     
     
       5. The multilayer capacitor of  claim 1 , wherein the first step-compensating portion is exposed from the third and fifth surfaces, and
 the second step-compensating portion is exposed from the fourth and sixth surfaces. 
 
     
     
       6. The multilayer capacitor of  claim 1 , further comprising:
 a third step-compensating portion disposed on an edge portion in a length direction on the second dielectric layer on which the second internal electrode is disposed, the third step-compensating portion being disposed on the first internal electrode; and 
 a fourth step-compensating portion disposed on another edge portion in the length direction on the first dielectric layer on which the first internal electrode is disposed, the fourth step-compensating portion being disposed on the second internal electrode. 
 
     
     
       7. The multilayer capacitor of  claim 6 , wherein the third step-compensating portion extends from the first step-compensating portion in the width direction, and
 the fourth step-compensating portion extends from the second step-compensating portion in the width direction. 
 
     
     
       8. The multilayer capacitor of  claim 6 , wherein the third step-compensating portion is exposed from the third surface, and
 the fourth step-compensating portion is exposed from the fourth surface. 
 
     
     
       9. A multilayer capacitor, comprising:
 a capacitor body comprising first and second dielectric layers and first and second internal electrodes, and a first surface and a second surface opposing each other, a third surface and a fourth surface connected to the first and second surfaces and opposing each other, and a fifth surface and a sixth surface connected to the first to fourth surfaces and opposing each other, the first internal electrode being exposed through the third surface and the fifth surface and the second internal electrode being exposed through the fourth surface and the sixth surface; 
 first and second side portions disposed on the fifth and sixth surfaces, respectively, of the capacitor body; 
 first and second external electrodes respectively disposed on the third and fourth surfaces of the body and respectively connected to the first and second internal electrodes; 
 a first step-compensating portion disposed on a first margin portion in a width direction on the second dielectric layer on which the second internal electrode is disposed, the first step-compensating portion being disposed on a first side of the first internal electrode in the width direction such that a second side of the first internal electrode in the width direction is devoid of a step-compensating portion thereon; and 
 a second step-compensating portion disposed on a second margin portion in the width direction on the first dielectric layer on which the first internal electrode is disposed, the second step-compensating portion being disposed on a first side of the second internal electrode in the width direction such that a second side of the second internal electrode in the width direction is devoid of a step-compensating portion thereon, 
 wherein an average thickness of each of the first and second internal electrodes is 0.41 μm or less. 
 
     
     
       10. The multilayer capacitor of  claim 9 , wherein the first and second external electrodes comprise:
 first and second connecting portions respectively disposed on the third and fourth surfaces of the capacitor body and respectively connected to the first and second internal electrodes; and 
 first and second band portions respectively extending to a portion of the first surface of the body from the first and second connecting portions. 
 
     
     
       11. The multilayer capacitor of  claim 9 , wherein the first step-compensating portion and the first internal electrode are made of a same material, and the second step-compensating portion and the second internal electrode are made of a same material. 
     
     
       12. The multilayer capacitor of  claim 9 , wherein the first margin portion is a portion in which the first and second internal electrodes do not overlap with each other,
 the first side portion is disposed on the first margin portion, 
 the second margin portion is another portion in which the first and second internal electrodes do not overlap with each other, and 
 the second side portion is disposed on the second margin portion. 
 
     
     
       13. The multilayer capacitor of  claim 9 , wherein the first step-compensating portion is exposed from the third and fifth surfaces, and
 the second step-compensating portion is exposed from the fourth and sixth surfaces. 
 
     
     
       14. The multilayer capacitor of  claim 9 , further comprising:
 a third step-compensating portion disposed on an edge portion in a length direction on the second dielectric layer on which the second internal electrode is disposed, the third step-compensating portion being disposed on the first internal electrode; and 
 a fourth step-compensating portion disposed on another edge portion in the length direction on the first dielectric layer on which the first internal electrode is disposed, the fourth step-compensating portion being disposed on the second internal electrode. 
 
     
     
       15. The multilayer capacitor of  claim 14 , wherein the third step-compensating portion extends from the first step-compensating portion in the width direction, and
 the fourth step-compensating portion extends from the second step-compensating portion in the width direction. 
 
     
     
       16. The multilayer capacitor of  claim 14 , wherein the third step-compensating portion is exposed from the third surface, and
 the fourth step-compensating portion is exposed from the fourth surface.