US11676976B2ActiveUtilityA1
PIN photodetector
Est. expiryOct 19, 2038(~12.3 yrs left)· nominal 20-yr term from priority
Y02E10/547Y02E10/52H01L 31/02005H01L 31/035281H01L 31/105H01L 27/1446H01L 31/02019H01L 31/0203H10F 77/953H10F 77/933H10F 77/147H10F 77/50H10F 30/223H10F 77/148H10F 77/206H10F 39/107
66
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References
19
Claims
Abstract
A PIN photodetector includes an n-type semiconductor layer, an n-type semiconductor cap layer, a first plurality of p-type regions located within the n-type semiconductor cap layer and separated from one another by a distance d1, and an absorber layer located between the n-type semiconductor layer and the n-type semiconductor cap layer including the first plurality of p-type regions. The plurality of p-type regions are electrically connected to one another to provide an electrical response to light incident to the PIN photodetector.
Claims
exact text as granted — not AI-modifiedThe invention claimed is:
1. A PIN photodetector comprising:
a first semiconductor layer;
a second semiconductor cap layer;
an array of semiconductor regions located within the second semiconductor cap layer, wherein each of the semiconductor regions in the array are separated from one another by approximately the same distance d 1 ;
an absorber layer located between the first semiconductor layer and the second semiconductor cap layer including the of semiconductor regions; and
wherein one or more electrical responses are generated by the array of semiconductor regions in response to light incident to the PIN photodetector.
2. The PIN photodetector of claim 1 , wherein the array of semiconductor regions is a two-dimensional array.
3. The PIN photodetector of claim 1 , wherein the first semiconductor layer is an n-type semiconductor layer, the second semiconductor cap layer is an n-type semiconductor cap layer, and the array of semiconductor regions are p-type regions.
4. The PIN photodetector of claim 1 , wherein the first semiconductor layer, the second semiconductor cap layer, the array of semiconductor regions, and the absorber layer are located on a first semiconductor die.
5. The PIN photodetector of claim 4 , wherein connections between the array of semiconductor regions are fabricated as part of the first semiconductor die.
6. The PIN photodetector of claim 4 , further including an electrical contact formed on each of the semiconductor regions included in the array of semiconductor regions.
7. The PIN photodetector of claim 6 , further including conductors located on each of the electrical contacts.
8. The PIN photodetector of claim 7 , further including a conductive layer connected to the array of semiconductor regions via the conductors and electrical contacts associated with each semiconductor region.
9. The PIN photodetector of claim 8 , wherein the conductive layer is included as part of an off-die package.
10. The PIN photodetector of claim 9 , wherein the off-die package is one of an integrated circuit package or a printed circuit board.
11. The PIN photodetector of claim 1 , wherein the array of semiconductor regions generates a plurality of depletion regions within the absorber layer separated by undepleted regions within the absorber layer.
12. The PIN photodetector of claim 11 , wherein adjacent depletion regions are separated by a distance d 3 , wherein the distance d 3 is approximately equal to or less than a diffusion length associated with charge carriers in the absorber layer.
13. The PIN photodetector of claim 1 , further including a guard ring located on a same plane as the array of semiconductor regions, wherein the guard ring surrounds the array of semiconductor regions.
14. An optical detection system comprising:
a PIN photodetector comprising:
an n-type semiconductor layer;
an n-type semiconductor cap layer;
a plurality of p-type diffusion regions diffused within the n-type semiconductor cap layer and separated from one another by a distance d 1 , the plurality of p-type diffusion regions arranged in a two-dimensional array of p-type diffusion regions;
an absorber layer located between the n-type semiconductor layer and the n-type semiconductor cap layer, wherein the plurality of p-type diffusion regions generate a plurality of depletion regions within the absorber layer, wherein each of the depletion regions are separated from adjacent depletion regions by a distance d 3 ; and
a signal conditioning circuit connected to receive an electrical response generated by the PIN photodetector, wherein the signal conditioning circuit is characterized by a bandwidth.
15. The optical detection system of claim 14 , wherein the distance d 3 between adjacent depletion regions is selected based on the bandwidth of the signal conditioning circuit and wherein the distance d 3 is selected such that a transit time of charge carriers created between the depletion regions is less than 1/bandwidth of the signal conditioning circuit.
16. The optical detection system of claim 14 , wherein the PIN photodetector further includes a plurality of conductors in electrical contact with the plurality of p-type diffusion regions to provide the electrical response to charge carriers collected by the plurality of p-type diffusion regions.
17. The optical detection system of claim 14 , wherein an electrical connection to the plurality of p-type diffusion regions is made within a packaging or carrier associated with the PIN photodetector.
18. The optical detection system of claim 14 , wherein the PIN photodetector further comprises:
a plurality of electrical contacts, each electrical contact associated with one of the p-type diffusion regions; and
a plurality of conductors, each conductor associated with one of the plurality of electrical contacts.
19. The optical detection system of claim 18 , further comprising:
one or more conductive layers connected to the array of p-type diffusion regions via the conductors and electrical contacts associated with each p-type diffusion region, wherein the one or more conductive layers is included as part of an off-die package contacting the PIN photodetector.Cited by (0)
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