Shallow trench isolation filling structure in semiconductor device

Abstract

Disclosed herein are apparatuses and methods that include a shallow trench isolation filling structure. An example method includes: etching a semiconductor substrate to form a plurality of pillars and a trench therebetween; providing rinse solution in the trench; adding a plurality of insulating particles into the rinse solution; and removing the rinse solution such that the insulating particles and an air gap remains in the trench.

The invention claimed is: 
     
       1. A method comprising:
 etching a semiconductor substrate to form a plurality of pillars and a trench therebetween; 
 providing rinse solution in the trench; 
 adding a plurality of insulating particles into the rinse solution; and 
 removing the rinse solution such that the insulating particles and an air gap remains in the trench. 
 
     
     
       2. The method of  claim 1 , wherein the insulating particles comprise a silicon oxide. 
     
     
       3. The method of  claim 2 ,
 wherein the semiconductor substrate comprises silicon, and 
 wherein the method further comprises, before the adding, removing a silicon oxide film formed on an inner wall of the trench to expose a side surface of the pillars. 
 
     
     
       4. The method of  claim 3 , wherein a pH level of the rinse solution with the insulating particles is less than 7. 
     
     
       5. The method of  claim 4 , wherein a range of the pH level of the rinse solution with the insulating particles is in a range from 2 to 4. 
     
     
       6. The method of  claim 4 ,
 wherein the etching is performed by using a mask including a silicon nitride film, and 
 wherein the adding is performed with at least a part of the mask in which a top surface comprises the silicon nitride film remains. 
 
     
     
       7. The method of  claim 1 , wherein the adding is performed by a sol-gel method in the rinse solution. 
     
     
       8. The method of  claim 1 , further comprising filling an upper section of the trench with an insulating film after removing to cap the air gap formed in a lower section of the trench. 
     
     
       9. A method comprising:
 forming a pillar-shaped structure on a semiconductor substrate, the pillar-shaped structure having a plurality of pillars to form a trench therebetween; 
 filling the trench by a solution with a plurality of insulating particles; and 
 removing the solution such that the insulating particles and an air gap remains in the trench. 
 
     
     
       10. The method of  claim 9 , wherein the insulating particles comprise a silicon oxide. 
     
     
       11. The method of  claim 9 , wherein each of the pillars is a cell capacitor of a DRAM cell.