Multilayer capacitive element having aspect ratio modulation structure and design method of the same

Abstract

A multilayer capacitive element and a design method of the same are provided. The capacitive element includes a substrate having a groove, a first aspect ratio modulation structure, and a plurality of conductive layers and a plurality of dielectric layers. The first aspect ratio modulation structure is located in the groove to define the groove as a first region and a first modulation region, wherein an aspect ratio of the first modulation region is different from that of the first region. The plurality of conductive layers and the plurality of dielectric layers are alternately stacked in the groove.

What is claimed is: 
     
       1. A multilayer capacitive element, comprising:
 a substrate having a groove; 
 a first aspect ratio modulation structure located in the groove to define the groove as a first region and a first modulation region, wherein an aspect ratio of the first modulation region is different from an aspect ratio of the first region; and 
 a plurality of conductive layers and a plurality of dielectric layers alternately stacked in the groove, 
 wherein at least one of the plurality of conductive layers is only disposed in the first region and not disposed in the first modulation region, in a top view, 
 wherein at least one conductive layer in the plurality of conductive layers is extended from the first region to the first modulation region, in a top view, 
 wherein a topmost conductive layer in the at least one conductive layer extended from the first region to the first modulation region completely fills a space of the groove of the first modulation region, in top view, and 
 wherein the plurality of conductive layers and the plurality of dielectric layers are not disposed on a top surface of the first aspect ratio modulation structure. 
 
     
     
       2. The multilayer capacitive element of  claim 1 , wherein a topmost conductive layer in the plurality of conductive layers completely fills a space of the groove. 
     
     
       3. The multilayer capacitive element of  claim 1 , wherein the first aspect ratio modulation structure defines the groove as the first region, the first modulation region, and a second region, wherein the first modulation region is located between the first region and the second region, and the aspect ratio of the first modulation region is different from the aspect ratio of the first region and an aspect ratio of the second region. 
     
     
       4. The multilayer capacitive element of  claim 3 , wherein the at least one conductive layer in the plurality of conductive layers is extended from the first region to the first modulation region and the second region. 
     
     
       5. The multilayer capacitive element of  claim 1 , further comprising a second aspect ratio modulation structure located in the first region to define the first region as a third region, a second modulation region, and a fourth region, wherein an aspect ratio of the second modulation region is different from an aspect ratio of the third region and an aspect ratio of the fourth region. 
     
     
       6. The multilayer capacitive element of  claim 5 , wherein at least one conductive layer in the plurality of conductive layers is extended from the third region to the second modulation region and the fourth region. 
     
     
       7. The multilayer capacitive element of  claim 6 , wherein a topmost conductive layer in the at least one conductive layer extended from the third region to the second modulation region and the fourth region completely fills a space of the groove of the second modulation region. 
     
     
       8. The multilayer capacitive element of  claim 5 , wherein a material of the second aspect ratio modulation structure is the same as a material of the substrate. 
     
     
       9. The multilayer capacitive element of  claim 1 , wherein a material of the first aspect ratio modulation structure is the same as a material of the substrate. 
     
     
       10. The multilayer capacitive element of  claim 1 , wherein a bottommost layer in the plurality of conductive layers and the plurality of dielectric layers is one of the conductive layers. 
     
     
       11. The multilayer capacitive element of  claim 1 , wherein a bottommost layer in the plurality of conductive layers and the plurality of dielectric layers is one of the dielectric layers.